[Qemu-devel] [PATCH 0/6] omap1: Separate omap1 subdevices from omap_mpu_state

[Qemu-devel] [PATCH 0/6] omap1: Separate omap1 subdevices from omap_mpu_state

[Peter Maydell]

This patchset is some minor cleanup which pulls out the data fields
of omap_mpu_state which are really specific to the omap1 into their
own structures in omap1.c. (At some point they can then be converted
fully into qdev devices I guess.)

There's also a couple of trivial cleanups from me in there.

Juha Riihimäki (4):
  hw/omap1.c: Separate PWL from omap_mpu_state
  hw/omap1.c: Separate PWT from omap_mpu_state
  hw/omap1.c: Separate dpll_ctl from omap_mpu_state
  hw/omap1.c: Separate clkm from omap_mpu_state

Peter Maydell (2):
  hw/omap1.c: omap_mpuio_init() need not be public
  hw/omap1.c: Drop unused includes

 hw/omap.h  |   44 +---------
 hw/omap1.c |  278 +++++++++++++++++++++++++++++++++++-------------------------
 2 files changed, 165 insertions(+), 157 deletions(-)

[Qemu-devel] [PATCH 1/6] hw/omap1.c: omap_mpuio_init() need not be public

[Peter Maydell]

omap_mpuio_init() is only used and defined in omap1.c, so make it static.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/omap.h  |    4 ----
 hw/omap1.c |    2 +-
 2 files changed, 1 insertions(+), 5 deletions(-)

diff --git a/hw/omap.h b/hw/omap.h
index 42eb361..5fe33db 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -672,10 +672,6 @@ void omap_uart_reset(struct omap_uart_s *s);
 void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr);
 
 struct omap_mpuio_s;
-struct omap_mpuio_s *omap_mpuio_init(MemoryRegion *system_memory,
-                target_phys_addr_t base,
-                qemu_irq kbd_int, qemu_irq gpio_int, qemu_irq wakeup,
-                omap_clk clk);
 qemu_irq *omap_mpuio_in_get(struct omap_mpuio_s *s);
 void omap_mpuio_out_set(struct omap_mpuio_s *s, int line, qemu_irq handler);
 void omap_mpuio_key(struct omap_mpuio_s *s, int row, int col, int down);
diff --git a/hw/omap1.c b/hw/omap1.c
index 53cde76..dddac92 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -2066,7 +2066,7 @@ static void omap_mpuio_onoff(void *opaque, int line, int on)
         omap_mpuio_kbd_update(s);
 }
 
-struct omap_mpuio_s *omap_mpuio_init(MemoryRegion *memory,
+static struct omap_mpuio_s *omap_mpuio_init(MemoryRegion *memory,
                 target_phys_addr_t base,
                 qemu_irq kbd_int, qemu_irq gpio_int, qemu_irq wakeup,
                 omap_clk clk)
-- 
1.7.1

[Qemu-devel] [PATCH 2/6] hw/omap1.c: Separate PWL from omap_mpu_state

[Peter Maydell]

From: Juha Riihimäki <juha.riihimaki@nokia.com>

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
[Riku Voipio: Fixes and restructuring patchset]
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
[Peter Maydell: More fixes and cleanups for upstream submission]
Signed-off-by:  Peter Maydell <peter.maydell@linaro.org>
---
 hw/omap.h  |    8 +-------
 hw/omap1.c |   60 ++++++++++++++++++++++++++++++++++++------------------------
 2 files changed, 37 insertions(+), 31 deletions(-)

diff --git a/hw/omap.h b/hw/omap.h
index 5fe33db..851ad46 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -829,7 +829,6 @@ struct omap_mpu_state_s {
     MemoryRegion tcmi_iomem;
     MemoryRegion clkm_iomem;
     MemoryRegion clkdsp_iomem;
-    MemoryRegion pwl_iomem;
     MemoryRegion pwt_iomem;
     MemoryRegion mpui_io_iomem;
     MemoryRegion tap_iomem;
@@ -867,12 +866,7 @@ struct omap_mpu_state_s {
 
     struct omap_uwire_s *microwire;
 
-    struct {
-        uint8_t output;
-        uint8_t level;
-        uint8_t enable;
-        int clk;
-    } pwl;
+    struct omap_pwl_s *pwl;
 
     struct {
         uint8_t frc;
diff --git a/hw/omap1.c b/hw/omap1.c
index dddac92..ccc6ecf 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -2289,12 +2289,20 @@ void omap_uwire_attach(struct omap_uwire_s *s,
 }
 
 /* Pseudonoise Pulse-Width Light Modulator */
-static void omap_pwl_update(struct omap_mpu_state_s *s)
+struct omap_pwl_s {
+    MemoryRegion iomem;
+    uint8_t output;
+    uint8_t level;
+    uint8_t enable;
+    int clk;
+};
+
+static void omap_pwl_update(struct omap_pwl_s *s)
 {
-    int output = (s->pwl.clk && s->pwl.enable) ? s->pwl.level : 0;
+    int output = (s->clk && s->enable) ? s->level : 0;
 
-    if (output != s->pwl.output) {
-        s->pwl.output = output;
+    if (output != s->output) {
+        s->output = output;
         printf("%s: Backlight now at %i/256\n", __FUNCTION__, output);
     }
 }
@@ -2302,7 +2310,7 @@ static void omap_pwl_update(struct omap_mpu_state_s *s)
 static uint64_t omap_pwl_read(void *opaque, target_phys_addr_t addr,
                               unsigned size)
 {
-    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+    struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
     int offset = addr & OMAP_MPUI_REG_MASK;
 
     if (size != 1) {
@@ -2311,9 +2319,9 @@ static uint64_t omap_pwl_read(void *opaque, target_phys_addr_t addr,
 
     switch (offset) {
     case 0x00:	/* PWL_LEVEL */
-        return s->pwl.level;
+        return s->level;
     case 0x04:	/* PWL_CTRL */
-        return s->pwl.enable;
+        return s->enable;
     }
     OMAP_BAD_REG(addr);
     return 0;
@@ -2322,7 +2330,7 @@ static uint64_t omap_pwl_read(void *opaque, target_phys_addr_t addr,
 static void omap_pwl_write(void *opaque, target_phys_addr_t addr,
                            uint64_t value, unsigned size)
 {
-    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+    struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
     int offset = addr & OMAP_MPUI_REG_MASK;
 
     if (size != 1) {
@@ -2331,11 +2339,11 @@ static void omap_pwl_write(void *opaque, target_phys_addr_t addr,
 
     switch (offset) {
     case 0x00:	/* PWL_LEVEL */
-        s->pwl.level = value;
+        s->level = value;
         omap_pwl_update(s);
         break;
     case 0x04:	/* PWL_CTRL */
-        s->pwl.enable = value & 1;
+        s->enable = value & 1;
         omap_pwl_update(s);
         break;
     default:
@@ -2350,34 +2358,37 @@ static const MemoryRegionOps omap_pwl_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-static void omap_pwl_reset(struct omap_mpu_state_s *s)
+static void omap_pwl_reset(struct omap_pwl_s *s)
 {
-    s->pwl.output = 0;
-    s->pwl.level = 0;
-    s->pwl.enable = 0;
-    s->pwl.clk = 1;
+    s->output = 0;
+    s->level = 0;
+    s->enable = 0;
+    s->clk = 1;
     omap_pwl_update(s);
 }
 
 static void omap_pwl_clk_update(void *opaque, int line, int on)
 {
-    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+    struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
 
-    s->pwl.clk = on;
+    s->clk = on;
     omap_pwl_update(s);
 }
 
-static void omap_pwl_init(MemoryRegion *system_memory,
-                target_phys_addr_t base, struct omap_mpu_state_s *s,
-                omap_clk clk)
+static struct omap_pwl_s *omap_pwl_init(MemoryRegion *system_memory,
+                                        target_phys_addr_t base,
+                                        omap_clk clk)
 {
+    struct omap_pwl_s *s = g_malloc0(sizeof(*s));
+
     omap_pwl_reset(s);
 
-    memory_region_init_io(&s->pwl_iomem, &omap_pwl_ops, s,
+    memory_region_init_io(&s->iomem, &omap_pwl_ops, s,
                           "omap-pwl", 0x800);
-    memory_region_add_subregion(system_memory, base, &s->pwl_iomem);
+    memory_region_add_subregion(system_memory, base, &s->iomem);
 
     omap_clk_adduser(clk, qemu_allocate_irqs(omap_pwl_clk_update, s, 1)[0]);
+    return s;
 }
 
 /* Pulse-Width Tone module */
@@ -3667,7 +3678,7 @@ static void omap1_mpu_reset(void *opaque)
     omap_mmc_reset(mpu->mmc);
     omap_mpuio_reset(mpu->mpuio);
     omap_uwire_reset(mpu->microwire);
-    omap_pwl_reset(mpu);
+    omap_pwl_reset(mpu->pwl);
     omap_pwt_reset(mpu);
     omap_i2c_reset(mpu->i2c[0]);
     omap_rtc_reset(mpu->rtc);
@@ -3961,7 +3972,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
                                    qdev_get_gpio_in(s->ih[1], OMAP_INT_uWireRX),
                     s->drq[OMAP_DMA_UWIRE_TX], omap_findclk(s, "mpuper_ck"));
 
-    omap_pwl_init(system_memory, 0xfffb5800, s, omap_findclk(s, "armxor_ck"));
+    s->pwl = omap_pwl_init(system_memory, 0xfffb5800,
+                           omap_findclk(s, "armxor_ck"));
     omap_pwt_init(system_memory, 0xfffb6000, s, omap_findclk(s, "armxor_ck"));
 
     s->i2c[0] = omap_i2c_init(system_memory, 0xfffb3800,
-- 
1.7.1

[Qemu-devel] [PATCH 3/6] hw/omap1.c: Separate PWT from omap_mpu_state

[Peter Maydell]

From: Juha Riihimäki <juha.riihimaki@nokia.com>

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
[Riku Voipio: Fixes and restructuring patchset]
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
[Peter Maydell: More fixes and cleanups for upstream submission]
Signed-off-by:  Peter Maydell <peter.maydell@linaro.org>
---
 hw/omap.h  |   10 +---------
 hw/omap1.c |   57 ++++++++++++++++++++++++++++++++++-----------------------
 2 files changed, 35 insertions(+), 32 deletions(-)

diff --git a/hw/omap.h b/hw/omap.h
index 851ad46..2e227b5 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -829,7 +829,6 @@ struct omap_mpu_state_s {
     MemoryRegion tcmi_iomem;
     MemoryRegion clkm_iomem;
     MemoryRegion clkdsp_iomem;
-    MemoryRegion pwt_iomem;
     MemoryRegion mpui_io_iomem;
     MemoryRegion tap_iomem;
     MemoryRegion imif_ram;
@@ -867,14 +866,7 @@ struct omap_mpu_state_s {
     struct omap_uwire_s *microwire;
 
     struct omap_pwl_s *pwl;
-
-    struct {
-        uint8_t frc;
-        uint8_t vrc;
-        uint8_t gcr;
-        omap_clk clk;
-    } pwt;
-
+    struct omap_pwt_s *pwt;
     struct omap_i2c_s *i2c[2];
 
     struct omap_rtc_s *rtc;
diff --git a/hw/omap1.c b/hw/omap1.c
index ccc6ecf..4635938 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -2392,10 +2392,18 @@ static struct omap_pwl_s *omap_pwl_init(MemoryRegion *system_memory,
 }
 
 /* Pulse-Width Tone module */
+struct omap_pwt_s {
+    MemoryRegion iomem;
+    uint8_t frc;
+    uint8_t vrc;
+    uint8_t gcr;
+    omap_clk clk;
+};
+
 static uint64_t omap_pwt_read(void *opaque, target_phys_addr_t addr,
                               unsigned size)
 {
-    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+    struct omap_pwt_s *s = (struct omap_pwt_s *) opaque;
     int offset = addr & OMAP_MPUI_REG_MASK;
 
     if (size != 1) {
@@ -2404,11 +2412,11 @@ static uint64_t omap_pwt_read(void *opaque, target_phys_addr_t addr,
 
     switch (offset) {
     case 0x00:	/* FRC */
-        return s->pwt.frc;
+        return s->frc;
     case 0x04:	/* VCR */
-        return s->pwt.vrc;
+        return s->vrc;
     case 0x08:	/* GCR */
-        return s->pwt.gcr;
+        return s->gcr;
     }
     OMAP_BAD_REG(addr);
     return 0;
@@ -2417,7 +2425,7 @@ static uint64_t omap_pwt_read(void *opaque, target_phys_addr_t addr,
 static void omap_pwt_write(void *opaque, target_phys_addr_t addr,
                            uint64_t value, unsigned size)
 {
-    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+    struct omap_pwt_s *s = (struct omap_pwt_s *) opaque;
     int offset = addr & OMAP_MPUI_REG_MASK;
 
     if (size != 1) {
@@ -2426,16 +2434,16 @@ static void omap_pwt_write(void *opaque, target_phys_addr_t addr,
 
     switch (offset) {
     case 0x00:	/* FRC */
-        s->pwt.frc = value & 0x3f;
+        s->frc = value & 0x3f;
         break;
     case 0x04:	/* VRC */
-        if ((value ^ s->pwt.vrc) & 1) {
+        if ((value ^ s->vrc) & 1) {
             if (value & 1)
                 printf("%s: %iHz buzz on\n", __FUNCTION__, (int)
                                 /* 1.5 MHz from a 12-MHz or 13-MHz PWT_CLK */
-                                ((omap_clk_getrate(s->pwt.clk) >> 3) /
+                                ((omap_clk_getrate(s->clk) >> 3) /
                                  /* Pre-multiplexer divider */
-                                 ((s->pwt.gcr & 2) ? 1 : 154) /
+                                 ((s->gcr & 2) ? 1 : 154) /
                                  /* Octave multiplexer */
                                  (2 << (value & 3)) *
                                  /* 101/107 divider */
@@ -2450,10 +2458,10 @@ static void omap_pwt_write(void *opaque, target_phys_addr_t addr,
             else
                 printf("%s: silence!\n", __FUNCTION__);
         }
-        s->pwt.vrc = value & 0x7f;
+        s->vrc = value & 0x7f;
         break;
     case 0x08:	/* GCR */
-        s->pwt.gcr = value & 3;
+        s->gcr = value & 3;
         break;
     default:
         OMAP_BAD_REG(addr);
@@ -2467,23 +2475,25 @@ static const MemoryRegionOps omap_pwt_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-static void omap_pwt_reset(struct omap_mpu_state_s *s)
+static void omap_pwt_reset(struct omap_pwt_s *s)
 {
-    s->pwt.frc = 0;
-    s->pwt.vrc = 0;
-    s->pwt.gcr = 0;
+    s->frc = 0;
+    s->vrc = 0;
+    s->gcr = 0;
 }
 
-static void omap_pwt_init(MemoryRegion *system_memory,
-                target_phys_addr_t base, struct omap_mpu_state_s *s,
-                omap_clk clk)
+static struct omap_pwt_s *omap_pwt_init(MemoryRegion *system_memory,
+                                        target_phys_addr_t base,
+                                        omap_clk clk)
 {
-    s->pwt.clk = clk;
+    struct omap_pwt_s *s = g_malloc0(sizeof(*s));
+    s->clk = clk;
     omap_pwt_reset(s);
 
-    memory_region_init_io(&s->pwt_iomem, &omap_pwt_ops, s,
+    memory_region_init_io(&s->iomem, &omap_pwt_ops, s,
                           "omap-pwt", 0x800);
-    memory_region_add_subregion(system_memory, base, &s->pwt_iomem);
+    memory_region_add_subregion(system_memory, base, &s->iomem);
+    return s;
 }
 
 /* Real-time Clock module */
@@ -3679,7 +3689,7 @@ static void omap1_mpu_reset(void *opaque)
     omap_mpuio_reset(mpu->mpuio);
     omap_uwire_reset(mpu->microwire);
     omap_pwl_reset(mpu->pwl);
-    omap_pwt_reset(mpu);
+    omap_pwt_reset(mpu->pwt);
     omap_i2c_reset(mpu->i2c[0]);
     omap_rtc_reset(mpu->rtc);
     omap_mcbsp_reset(mpu->mcbsp1);
@@ -3974,7 +3984,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
 
     s->pwl = omap_pwl_init(system_memory, 0xfffb5800,
                            omap_findclk(s, "armxor_ck"));
-    omap_pwt_init(system_memory, 0xfffb6000, s, omap_findclk(s, "armxor_ck"));
+    s->pwt = omap_pwt_init(system_memory, 0xfffb6000,
+                           omap_findclk(s, "armxor_ck"));
 
     s->i2c[0] = omap_i2c_init(system_memory, 0xfffb3800,
                               qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C),
-- 
1.7.1

[Qemu-devel] [PATCH 4/6] hw/omap1.c: Separate dpll_ctl from omap_mpu_state

[Peter Maydell]

From: Juha Riihimäki <juha.riihimaki@nokia.com>

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
[Riku Voipio: Fixes and restructuring patchset]
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
[Peter Maydell: More fixes and cleanups for upstream submission]
Signed-off-by:  Peter Maydell <peter.maydell@linaro.org>
---
 hw/omap.h  |    6 +-----
 hw/omap1.c |   28 ++++++++++++++++++----------
 2 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/hw/omap.h b/hw/omap.h
index 2e227b5..60fa34c 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -904,11 +904,7 @@ struct omap_mpu_state_s {
 
     uint32_t tcmi_regs[17];
 
-    struct dpll_ctl_s {
-        MemoryRegion iomem;
-        uint16_t mode;
-        omap_clk dpll;
-    } dpll[3];
+    struct dpll_ctl_s *dpll[3];
 
     omap_clk clks;
     struct {
diff --git a/hw/omap1.c b/hw/omap1.c
index 4635938..6ab9192 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -1344,6 +1344,12 @@ static void omap_tcmi_init(MemoryRegion *memory, target_phys_addr_t base,
 }
 
 /* Digital phase-locked loops control */
+struct dpll_ctl_s {
+    MemoryRegion iomem;
+    uint16_t mode;
+    omap_clk dpll;
+};
+
 static uint64_t omap_dpll_read(void *opaque, target_phys_addr_t addr,
                                unsigned size)
 {
@@ -1409,15 +1415,17 @@ static void omap_dpll_reset(struct dpll_ctl_s *s)
     omap_clk_setrate(s->dpll, 1, 1);
 }
 
-static void omap_dpll_init(MemoryRegion *memory, struct dpll_ctl_s *s,
+static struct dpll_ctl_s  *omap_dpll_init(MemoryRegion *memory,
                            target_phys_addr_t base, omap_clk clk)
 {
+    struct dpll_ctl_s *s = g_malloc0(sizeof(*s));
     memory_region_init_io(&s->iomem, &omap_dpll_ops, s, "omap-dpll", 0x100);
 
     s->dpll = clk;
     omap_dpll_reset(s);
 
     memory_region_add_subregion(memory, base, &s->iomem);
+    return s;
 }
 
 /* MPU Clock/Reset/Power Mode Control */
@@ -3679,9 +3687,9 @@ static void omap1_mpu_reset(void *opaque)
     omap_mpui_reset(mpu);
     omap_tipb_bridge_reset(mpu->private_tipb);
     omap_tipb_bridge_reset(mpu->public_tipb);
-    omap_dpll_reset(&mpu->dpll[0]);
-    omap_dpll_reset(&mpu->dpll[1]);
-    omap_dpll_reset(&mpu->dpll[2]);
+    omap_dpll_reset(mpu->dpll[0]);
+    omap_dpll_reset(mpu->dpll[1]);
+    omap_dpll_reset(mpu->dpll[2]);
     omap_uart_reset(mpu->uart[0]);
     omap_uart_reset(mpu->uart[1]);
     omap_uart_reset(mpu->uart[2]);
@@ -3947,12 +3955,12 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
                     "uart3",
                     serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);
 
-    omap_dpll_init(system_memory,
-                   &s->dpll[0], 0xfffecf00, omap_findclk(s, "dpll1"));
-    omap_dpll_init(system_memory,
-                   &s->dpll[1], 0xfffed000, omap_findclk(s, "dpll2"));
-    omap_dpll_init(system_memory,
-                   &s->dpll[2], 0xfffed100, omap_findclk(s, "dpll3"));
+    s->dpll[0] = omap_dpll_init(system_memory, 0xfffecf00,
+                                omap_findclk(s, "dpll1"));
+    s->dpll[1] = omap_dpll_init(system_memory, 0xfffed000,
+                                omap_findclk(s, "dpll2"));
+    s->dpll[2] = omap_dpll_init(system_memory, 0xfffed100,
+                                omap_findclk(s, "dpll3"));
 
     dinfo = drive_get(IF_SD, 0, 0);
     if (!dinfo) {
-- 
1.7.1

[Qemu-devel] [PATCH 5/6] hw/omap1.c: Separate clkm from omap_mpu_state

[Peter Maydell]

From: Juha Riihimäki <juha.riihimaki@nokia.com>

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
[Riku Voipio: Fixes and restructuring patchset]
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
[Peter Maydell: More fixes and cleanups for upstream submission]
Signed-off-by:  Peter Maydell <peter.maydell@linaro.org>
---
 hw/omap.h  |   16 +-------
 hw/omap1.c |  127 ++++++++++++++++++++++++++++++++++--------------------------
 2 files changed, 73 insertions(+), 70 deletions(-)

diff --git a/hw/omap.h b/hw/omap.h
index 60fa34c..17b4312 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -907,21 +907,7 @@ struct omap_mpu_state_s {
     struct dpll_ctl_s *dpll[3];
 
     omap_clk clks;
-    struct {
-        int cold_start;
-        int clocking_scheme;
-        uint16_t arm_ckctl;
-        uint16_t arm_idlect1;
-        uint16_t arm_idlect2;
-        uint16_t arm_ewupct;
-        uint16_t arm_rstct1;
-        uint16_t arm_rstct2;
-        uint16_t arm_ckout1;
-        int dpll1_mode;
-        uint16_t dsp_idlect1;
-        uint16_t dsp_idlect2;
-        uint16_t dsp_rstct2;
-    } clkm;
+    struct omap_clkm_s *clkm;
 
     /* OMAP2-only peripherals */
     struct omap_l4_s *l4;
diff --git a/hw/omap1.c b/hw/omap1.c
index 6ab9192..5fc67e9 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -1429,6 +1429,22 @@ static struct dpll_ctl_s  *omap_dpll_init(MemoryRegion *memory,
 }
 
 /* MPU Clock/Reset/Power Mode Control */
+struct omap_clkm_s {
+    int cold_start;
+    int clocking_scheme;
+    uint16_t arm_ckctl;
+    uint16_t arm_idlect1;
+    uint16_t arm_idlect2;
+    uint16_t arm_ewupct;
+    uint16_t arm_rstct1;
+    uint16_t arm_rstct2;
+    uint16_t arm_ckout1;
+    int dpll1_mode;
+    uint16_t dsp_idlect1;
+    uint16_t dsp_idlect2;
+    uint16_t dsp_rstct2;
+};
+
 static uint64_t omap_clkm_read(void *opaque, target_phys_addr_t addr,
                                unsigned size)
 {
@@ -1440,28 +1456,28 @@ static uint64_t omap_clkm_read(void *opaque, target_phys_addr_t addr,
 
     switch (addr) {
     case 0x00:	/* ARM_CKCTL */
-        return s->clkm.arm_ckctl;
+        return s->clkm->arm_ckctl;
 
     case 0x04:	/* ARM_IDLECT1 */
-        return s->clkm.arm_idlect1;
+        return s->clkm->arm_idlect1;
 
     case 0x08:	/* ARM_IDLECT2 */
-        return s->clkm.arm_idlect2;
+        return s->clkm->arm_idlect2;
 
     case 0x0c:	/* ARM_EWUPCT */
-        return s->clkm.arm_ewupct;
+        return s->clkm->arm_ewupct;
 
     case 0x10:	/* ARM_RSTCT1 */
-        return s->clkm.arm_rstct1;
+        return s->clkm->arm_rstct1;
 
     case 0x14:	/* ARM_RSTCT2 */
-        return s->clkm.arm_rstct2;
+        return s->clkm->arm_rstct2;
 
     case 0x18:	/* ARM_SYSST */
-        return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start;
+        return (s->clkm->clocking_scheme << 11) | s->clkm->cold_start;
 
     case 0x1c:	/* ARM_CKOUT1 */
-        return s->clkm.arm_ckout1;
+        return s->clkm->arm_ckout1;
 
     case 0x20:	/* ARM_CKOUT2 */
         break;
@@ -1647,33 +1663,33 @@ static void omap_clkm_write(void *opaque, target_phys_addr_t addr,
 
     switch (addr) {
     case 0x00:	/* ARM_CKCTL */
-        diff = s->clkm.arm_ckctl ^ value;
-        s->clkm.arm_ckctl = value & 0x7fff;
+        diff = s->clkm->arm_ckctl ^ value;
+        s->clkm->arm_ckctl = value & 0x7fff;
         omap_clkm_ckctl_update(s, diff, value);
         return;
 
     case 0x04:	/* ARM_IDLECT1 */
-        diff = s->clkm.arm_idlect1 ^ value;
-        s->clkm.arm_idlect1 = value & 0x0fff;
+        diff = s->clkm->arm_idlect1 ^ value;
+        s->clkm->arm_idlect1 = value & 0x0fff;
         omap_clkm_idlect1_update(s, diff, value);
         return;
 
     case 0x08:	/* ARM_IDLECT2 */
-        diff = s->clkm.arm_idlect2 ^ value;
-        s->clkm.arm_idlect2 = value & 0x07ff;
+        diff = s->clkm->arm_idlect2 ^ value;
+        s->clkm->arm_idlect2 = value & 0x07ff;
         omap_clkm_idlect2_update(s, diff, value);
         return;
 
     case 0x0c:	/* ARM_EWUPCT */
-        s->clkm.arm_ewupct = value & 0x003f;
+        s->clkm->arm_ewupct = value & 0x003f;
         return;
 
     case 0x10:	/* ARM_RSTCT1 */
-        diff = s->clkm.arm_rstct1 ^ value;
-        s->clkm.arm_rstct1 = value & 0x0007;
+        diff = s->clkm->arm_rstct1 ^ value;
+        s->clkm->arm_rstct1 = value & 0x0007;
         if (value & 9) {
             qemu_system_reset_request();
-            s->clkm.cold_start = 0xa;
+            s->clkm->cold_start = 0xa;
         }
         if (diff & ~value & 4) {				/* DSP_RST */
             omap_mpui_reset(s);
@@ -1687,21 +1703,21 @@ static void omap_clkm_write(void *opaque, target_phys_addr_t addr,
         return;
 
     case 0x14:	/* ARM_RSTCT2 */
-        s->clkm.arm_rstct2 = value & 0x0001;
+        s->clkm->arm_rstct2 = value & 0x0001;
         return;
 
     case 0x18:	/* ARM_SYSST */
-        if ((s->clkm.clocking_scheme ^ (value >> 11)) & 7) {
-            s->clkm.clocking_scheme = (value >> 11) & 7;
+        if ((s->clkm->clocking_scheme ^ (value >> 11)) & 7) {
+            s->clkm->clocking_scheme = (value >> 11) & 7;
             printf("%s: clocking scheme set to %s\n", __FUNCTION__,
-                            clkschemename[s->clkm.clocking_scheme]);
+                            clkschemename[s->clkm->clocking_scheme]);
         }
-        s->clkm.cold_start &= value & 0x3f;
+        s->clkm->cold_start &= value & 0x3f;
         return;
 
     case 0x1c:	/* ARM_CKOUT1 */
-        diff = s->clkm.arm_ckout1 ^ value;
-        s->clkm.arm_ckout1 = value & 0x003f;
+        diff = s->clkm->arm_ckout1 ^ value;
+        s->clkm->arm_ckout1 = value & 0x003f;
         omap_clkm_ckout1_update(s, diff, value);
         return;
 
@@ -1728,16 +1744,16 @@ static uint64_t omap_clkdsp_read(void *opaque, target_phys_addr_t addr,
 
     switch (addr) {
     case 0x04:	/* DSP_IDLECT1 */
-        return s->clkm.dsp_idlect1;
+        return s->clkm->dsp_idlect1;
 
     case 0x08:	/* DSP_IDLECT2 */
-        return s->clkm.dsp_idlect2;
+        return s->clkm->dsp_idlect2;
 
     case 0x14:	/* DSP_RSTCT2 */
-        return s->clkm.dsp_rstct2;
+        return s->clkm->dsp_rstct2;
 
     case 0x18:	/* DSP_SYSST */
-        return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
+        return (s->clkm->clocking_scheme << 11) | s->clkm->cold_start |
                 (s->env->halted << 6);	/* Quite useless... */
     }
 
@@ -1773,23 +1789,23 @@ static void omap_clkdsp_write(void *opaque, target_phys_addr_t addr,
 
     switch (addr) {
     case 0x04:	/* DSP_IDLECT1 */
-        diff = s->clkm.dsp_idlect1 ^ value;
-        s->clkm.dsp_idlect1 = value & 0x01f7;
+        diff = s->clkm->dsp_idlect1 ^ value;
+        s->clkm->dsp_idlect1 = value & 0x01f7;
         omap_clkdsp_idlect1_update(s, diff, value);
         break;
 
     case 0x08:	/* DSP_IDLECT2 */
-        s->clkm.dsp_idlect2 = value & 0x0037;
-        diff = s->clkm.dsp_idlect1 ^ value;
+        s->clkm->dsp_idlect2 = value & 0x0037;
+        diff = s->clkm->dsp_idlect1 ^ value;
         omap_clkdsp_idlect2_update(s, diff, value);
         break;
 
     case 0x14:	/* DSP_RSTCT2 */
-        s->clkm.dsp_rstct2 = value & 0x0001;
+        s->clkm->dsp_rstct2 = value & 0x0001;
         break;
 
     case 0x18:	/* DSP_SYSST */
-        s->clkm.cold_start &= value & 0x3f;
+        s->clkm->cold_start &= value & 0x3f;
         break;
 
     default:
@@ -1806,24 +1822,24 @@ static const MemoryRegionOps omap_clkdsp_ops = {
 static void omap_clkm_reset(struct omap_mpu_state_s *s)
 {
     if (s->wdt && s->wdt->reset)
-        s->clkm.cold_start = 0x6;
-    s->clkm.clocking_scheme = 0;
+        s->clkm->cold_start = 0x6;
+    s->clkm->clocking_scheme = 0;
     omap_clkm_ckctl_update(s, ~0, 0x3000);
-    s->clkm.arm_ckctl = 0x3000;
-    omap_clkm_idlect1_update(s, s->clkm.arm_idlect1 ^ 0x0400, 0x0400);
-    s->clkm.arm_idlect1 = 0x0400;
-    omap_clkm_idlect2_update(s, s->clkm.arm_idlect2 ^ 0x0100, 0x0100);
-    s->clkm.arm_idlect2 = 0x0100;
-    s->clkm.arm_ewupct = 0x003f;
-    s->clkm.arm_rstct1 = 0x0000;
-    s->clkm.arm_rstct2 = 0x0000;
-    s->clkm.arm_ckout1 = 0x0015;
-    s->clkm.dpll1_mode = 0x2002;
-    omap_clkdsp_idlect1_update(s, s->clkm.dsp_idlect1 ^ 0x0040, 0x0040);
-    s->clkm.dsp_idlect1 = 0x0040;
+    s->clkm->arm_ckctl = 0x3000;
+    omap_clkm_idlect1_update(s, s->clkm->arm_idlect1 ^ 0x0400, 0x0400);
+    s->clkm->arm_idlect1 = 0x0400;
+    omap_clkm_idlect2_update(s, s->clkm->arm_idlect2 ^ 0x0100, 0x0100);
+    s->clkm->arm_idlect2 = 0x0100;
+    s->clkm->arm_ewupct = 0x003f;
+    s->clkm->arm_rstct1 = 0x0000;
+    s->clkm->arm_rstct2 = 0x0000;
+    s->clkm->arm_ckout1 = 0x0015;
+    s->clkm->dpll1_mode = 0x2002;
+    omap_clkdsp_idlect1_update(s, s->clkm->dsp_idlect1 ^ 0x0040, 0x0040);
+    s->clkm->dsp_idlect1 = 0x0040;
     omap_clkdsp_idlect2_update(s, ~0, 0x0000);
-    s->clkm.dsp_idlect2 = 0x0000;
-    s->clkm.dsp_rstct2 = 0x0000;
+    s->clkm->dsp_idlect2 = 0x0000;
+    s->clkm->dsp_rstct2 = 0x0000;
 }
 
 static void omap_clkm_init(MemoryRegion *memory, target_phys_addr_t mpu_base,
@@ -1834,11 +1850,12 @@ static void omap_clkm_init(MemoryRegion *memory, target_phys_addr_t mpu_base,
     memory_region_init_io(&s->clkdsp_iomem, &omap_clkdsp_ops, s,
                           "omap-clkdsp", 0x1000);
 
-    s->clkm.arm_idlect1 = 0x03ff;
-    s->clkm.arm_idlect2 = 0x0100;
-    s->clkm.dsp_idlect1 = 0x0002;
+    s->clkm = g_malloc0(sizeof(*(s->clkm)));
+    s->clkm->arm_idlect1 = 0x03ff;
+    s->clkm->arm_idlect2 = 0x0100;
+    s->clkm->dsp_idlect1 = 0x0002;
     omap_clkm_reset(s);
-    s->clkm.cold_start = 0x3a;
+    s->clkm->cold_start = 0x3a;
 
     memory_region_add_subregion(memory, mpu_base, &s->clkm_iomem);
     memory_region_add_subregion(memory, dsp_base, &s->clkdsp_iomem);
-- 
1.7.1

[Qemu-devel] [PATCH 6/6] hw/omap1.c: Drop unused includes

[Peter Maydell]

Drop includes of qemu-timer.h, qemu-char.h and pc.h as they are no
longer needed.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/omap1.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/hw/omap1.c b/hw/omap1.c
index 5fc67e9..f89dca5 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -20,11 +20,7 @@
 #include "arm-misc.h"
 #include "omap.h"
 #include "sysemu.h"
-#include "qemu-timer.h"
-#include "qemu-char.h"
 #include "soc_dma.h"
-/* We use pc-style serial ports.  */
-#include "pc.h"
 #include "blockdev.h"
 #include "range.h"
 #include "sysbus.h"
-- 
1.7.1

Re: [Qemu-devel] [PATCH 5/6] hw/omap1.c: Separate clkm from omap_mpu_state

[andrzej zaborowski]

On 20 December 2011 19:11, Peter Maydell <peter.maydell@linaro.org> wrote:
> From: Juha Riihimäki <juha.riihimaki@nokia.com>
>
> Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
> [Riku Voipio: Fixes and restructuring patchset]
> Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
> [Peter Maydell: More fixes and cleanups for upstream submission]
> Signed-off-by:  Peter Maydell <peter.maydell@linaro.org>
> ---
>  hw/omap.h  |   16 +-------
>  hw/omap1.c |  127 ++++++++++++++++++++++++++++++++++--------------------------
>  2 files changed, 73 insertions(+), 70 deletions(-)
>
> diff --git a/hw/omap.h b/hw/omap.h
> index 60fa34c..17b4312 100644
> --- a/hw/omap.h
> +++ b/hw/omap.h
> @@ -907,21 +907,7 @@ struct omap_mpu_state_s {
>     struct dpll_ctl_s *dpll[3];
>
>     omap_clk clks;
> -    struct {
> -        int cold_start;
> -        int clocking_scheme;
> -        uint16_t arm_ckctl;
> -        uint16_t arm_idlect1;
> -        uint16_t arm_idlect2;
> -        uint16_t arm_ewupct;
> -        uint16_t arm_rstct1;
> -        uint16_t arm_rstct2;
> -        uint16_t arm_ckout1;
> -        int dpll1_mode;
> -        uint16_t dsp_idlect1;
> -        uint16_t dsp_idlect2;
> -        uint16_t dsp_rstct2;
> -    } clkm;
> +    struct omap_clkm_s *clkm;
>
>     /* OMAP2-only peripherals */
>     struct omap_l4_s *l4;
> diff --git a/hw/omap1.c b/hw/omap1.c
> index 6ab9192..5fc67e9 100644
> --- a/hw/omap1.c
> +++ b/hw/omap1.c
> @@ -1429,6 +1429,22 @@ static struct dpll_ctl_s  *omap_dpll_init(MemoryRegion *memory,
>  }
>
>  /* MPU Clock/Reset/Power Mode Control */
> +struct omap_clkm_s {
> +    int cold_start;
> +    int clocking_scheme;
> +    uint16_t arm_ckctl;
> +    uint16_t arm_idlect1;
> +    uint16_t arm_idlect2;
> +    uint16_t arm_ewupct;
> +    uint16_t arm_rstct1;
> +    uint16_t arm_rstct2;
> +    uint16_t arm_ckout1;
> +    int dpll1_mode;
> +    uint16_t dsp_idlect1;
> +    uint16_t dsp_idlect2;
> +    uint16_t dsp_rstct2;
> +};
> +
>  static uint64_t omap_clkm_read(void *opaque, target_phys_addr_t addr,
>                                unsigned size)
>  {
> @@ -1440,28 +1456,28 @@ static uint64_t omap_clkm_read(void *opaque, target_phys_addr_t addr,
>
>     switch (addr) {
>     case 0x00: /* ARM_CKCTL */
> -        return s->clkm.arm_ckctl;
> +        return s->clkm->arm_ckctl;
>
>     case 0x04: /* ARM_IDLECT1 */
> -        return s->clkm.arm_idlect1;
> +        return s->clkm->arm_idlect1;
>
>     case 0x08: /* ARM_IDLECT2 */
> -        return s->clkm.arm_idlect2;
> +        return s->clkm->arm_idlect2;
>
>     case 0x0c: /* ARM_EWUPCT */
> -        return s->clkm.arm_ewupct;
> +        return s->clkm->arm_ewupct;
>
>     case 0x10: /* ARM_RSTCT1 */
> -        return s->clkm.arm_rstct1;
> +        return s->clkm->arm_rstct1;
>
>     case 0x14: /* ARM_RSTCT2 */
> -        return s->clkm.arm_rstct2;
> +        return s->clkm->arm_rstct2;
>
>     case 0x18: /* ARM_SYSST */
> -        return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start;
> +        return (s->clkm->clocking_scheme << 11) | s->clkm->cold_start;
>
>     case 0x1c: /* ARM_CKOUT1 */
> -        return s->clkm.arm_ckout1;
> +        return s->clkm->arm_ckout1;
>
>     case 0x20: /* ARM_CKOUT2 */
>         break;
> @@ -1647,33 +1663,33 @@ static void omap_clkm_write(void *opaque, target_phys_addr_t addr,
>
>     switch (addr) {
>     case 0x00: /* ARM_CKCTL */
> -        diff = s->clkm.arm_ckctl ^ value;
> -        s->clkm.arm_ckctl = value & 0x7fff;
> +        diff = s->clkm->arm_ckctl ^ value;
> +        s->clkm->arm_ckctl = value & 0x7fff;
>         omap_clkm_ckctl_update(s, diff, value);
>         return;
>
>     case 0x04: /* ARM_IDLECT1 */
> -        diff = s->clkm.arm_idlect1 ^ value;
> -        s->clkm.arm_idlect1 = value & 0x0fff;
> +        diff = s->clkm->arm_idlect1 ^ value;
> +        s->clkm->arm_idlect1 = value & 0x0fff;
>         omap_clkm_idlect1_update(s, diff, value);
>         return;
>
>     case 0x08: /* ARM_IDLECT2 */
> -        diff = s->clkm.arm_idlect2 ^ value;
> -        s->clkm.arm_idlect2 = value & 0x07ff;
> +        diff = s->clkm->arm_idlect2 ^ value;
> +        s->clkm->arm_idlect2 = value & 0x07ff;
>         omap_clkm_idlect2_update(s, diff, value);
>         return;
>
>     case 0x0c: /* ARM_EWUPCT */
> -        s->clkm.arm_ewupct = value & 0x003f;
> +        s->clkm->arm_ewupct = value & 0x003f;
>         return;
>
>     case 0x10: /* ARM_RSTCT1 */
> -        diff = s->clkm.arm_rstct1 ^ value;
> -        s->clkm.arm_rstct1 = value & 0x0007;
> +        diff = s->clkm->arm_rstct1 ^ value;
> +        s->clkm->arm_rstct1 = value & 0x0007;
>         if (value & 9) {
>             qemu_system_reset_request();
> -            s->clkm.cold_start = 0xa;
> +            s->clkm->cold_start = 0xa;
>         }
>         if (diff & ~value & 4) {                               /* DSP_RST */
>             omap_mpui_reset(s);
> @@ -1687,21 +1703,21 @@ static void omap_clkm_write(void *opaque, target_phys_addr_t addr,
>         return;
>
>     case 0x14: /* ARM_RSTCT2 */
> -        s->clkm.arm_rstct2 = value & 0x0001;
> +        s->clkm->arm_rstct2 = value & 0x0001;
>         return;
>
>     case 0x18: /* ARM_SYSST */
> -        if ((s->clkm.clocking_scheme ^ (value >> 11)) & 7) {
> -            s->clkm.clocking_scheme = (value >> 11) & 7;
> +        if ((s->clkm->clocking_scheme ^ (value >> 11)) & 7) {
> +            s->clkm->clocking_scheme = (value >> 11) & 7;
>             printf("%s: clocking scheme set to %s\n", __FUNCTION__,
> -                            clkschemename[s->clkm.clocking_scheme]);
> +                            clkschemename[s->clkm->clocking_scheme]);
>         }
> -        s->clkm.cold_start &= value & 0x3f;
> +        s->clkm->cold_start &= value & 0x3f;
>         return;
>
>     case 0x1c: /* ARM_CKOUT1 */
> -        diff = s->clkm.arm_ckout1 ^ value;
> -        s->clkm.arm_ckout1 = value & 0x003f;
> +        diff = s->clkm->arm_ckout1 ^ value;
> +        s->clkm->arm_ckout1 = value & 0x003f;
>         omap_clkm_ckout1_update(s, diff, value);
>         return;
>
> @@ -1728,16 +1744,16 @@ static uint64_t omap_clkdsp_read(void *opaque, target_phys_addr_t addr,
>
>     switch (addr) {
>     case 0x04: /* DSP_IDLECT1 */
> -        return s->clkm.dsp_idlect1;
> +        return s->clkm->dsp_idlect1;
>
>     case 0x08: /* DSP_IDLECT2 */
> -        return s->clkm.dsp_idlect2;
> +        return s->clkm->dsp_idlect2;
>
>     case 0x14: /* DSP_RSTCT2 */
> -        return s->clkm.dsp_rstct2;
> +        return s->clkm->dsp_rstct2;
>
>     case 0x18: /* DSP_SYSST */
> -        return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
> +        return (s->clkm->clocking_scheme << 11) | s->clkm->cold_start |
>                 (s->env->halted << 6); /* Quite useless... */
>     }
>
> @@ -1773,23 +1789,23 @@ static void omap_clkdsp_write(void *opaque, target_phys_addr_t addr,
>
>     switch (addr) {
>     case 0x04: /* DSP_IDLECT1 */
> -        diff = s->clkm.dsp_idlect1 ^ value;
> -        s->clkm.dsp_idlect1 = value & 0x01f7;
> +        diff = s->clkm->dsp_idlect1 ^ value;
> +        s->clkm->dsp_idlect1 = value & 0x01f7;
>         omap_clkdsp_idlect1_update(s, diff, value);
>         break;
>
>     case 0x08: /* DSP_IDLECT2 */
> -        s->clkm.dsp_idlect2 = value & 0x0037;
> -        diff = s->clkm.dsp_idlect1 ^ value;
> +        s->clkm->dsp_idlect2 = value & 0x0037;
> +        diff = s->clkm->dsp_idlect1 ^ value;
>         omap_clkdsp_idlect2_update(s, diff, value);
>         break;
>
>     case 0x14: /* DSP_RSTCT2 */
> -        s->clkm.dsp_rstct2 = value & 0x0001;
> +        s->clkm->dsp_rstct2 = value & 0x0001;
>         break;
>
>     case 0x18: /* DSP_SYSST */
> -        s->clkm.cold_start &= value & 0x3f;
> +        s->clkm->cold_start &= value & 0x3f;
>         break;
>
>     default:
> @@ -1806,24 +1822,24 @@ static const MemoryRegionOps omap_clkdsp_ops = {
>  static void omap_clkm_reset(struct omap_mpu_state_s *s)
>  {
>     if (s->wdt && s->wdt->reset)
> -        s->clkm.cold_start = 0x6;
> -    s->clkm.clocking_scheme = 0;
> +        s->clkm->cold_start = 0x6;
> +    s->clkm->clocking_scheme = 0;
>     omap_clkm_ckctl_update(s, ~0, 0x3000);
> -    s->clkm.arm_ckctl = 0x3000;
> -    omap_clkm_idlect1_update(s, s->clkm.arm_idlect1 ^ 0x0400, 0x0400);
> -    s->clkm.arm_idlect1 = 0x0400;
> -    omap_clkm_idlect2_update(s, s->clkm.arm_idlect2 ^ 0x0100, 0x0100);
> -    s->clkm.arm_idlect2 = 0x0100;
> -    s->clkm.arm_ewupct = 0x003f;
> -    s->clkm.arm_rstct1 = 0x0000;
> -    s->clkm.arm_rstct2 = 0x0000;
> -    s->clkm.arm_ckout1 = 0x0015;
> -    s->clkm.dpll1_mode = 0x2002;
> -    omap_clkdsp_idlect1_update(s, s->clkm.dsp_idlect1 ^ 0x0040, 0x0040);
> -    s->clkm.dsp_idlect1 = 0x0040;
> +    s->clkm->arm_ckctl = 0x3000;
> +    omap_clkm_idlect1_update(s, s->clkm->arm_idlect1 ^ 0x0400, 0x0400);
> +    s->clkm->arm_idlect1 = 0x0400;
> +    omap_clkm_idlect2_update(s, s->clkm->arm_idlect2 ^ 0x0100, 0x0100);
> +    s->clkm->arm_idlect2 = 0x0100;
> +    s->clkm->arm_ewupct = 0x003f;
> +    s->clkm->arm_rstct1 = 0x0000;
> +    s->clkm->arm_rstct2 = 0x0000;
> +    s->clkm->arm_ckout1 = 0x0015;
> +    s->clkm->dpll1_mode = 0x2002;
> +    omap_clkdsp_idlect1_update(s, s->clkm->dsp_idlect1 ^ 0x0040, 0x0040);
> +    s->clkm->dsp_idlect1 = 0x0040;
>     omap_clkdsp_idlect2_update(s, ~0, 0x0000);
> -    s->clkm.dsp_idlect2 = 0x0000;
> -    s->clkm.dsp_rstct2 = 0x0000;
> +    s->clkm->dsp_idlect2 = 0x0000;
> +    s->clkm->dsp_rstct2 = 0x0000;
>  }
>
>  static void omap_clkm_init(MemoryRegion *memory, target_phys_addr_t mpu_base,
> @@ -1834,11 +1850,12 @@ static void omap_clkm_init(MemoryRegion *memory, target_phys_addr_t mpu_base,
>     memory_region_init_io(&s->clkdsp_iomem, &omap_clkdsp_ops, s,
>                           "omap-clkdsp", 0x1000);
>
> -    s->clkm.arm_idlect1 = 0x03ff;
> -    s->clkm.arm_idlect2 = 0x0100;
> -    s->clkm.dsp_idlect1 = 0x0002;
> +    s->clkm = g_malloc0(sizeof(*(s->clkm)));
> +    s->clkm->arm_idlect1 = 0x03ff;
> +    s->clkm->arm_idlect2 = 0x0100;
> +    s->clkm->dsp_idlect1 = 0x0002;
>     omap_clkm_reset(s);
> -    s->clkm.cold_start = 0x3a;
> +    s->clkm->cold_start = 0x3a;

Since this sub device uses parts of the rest of mpu state, it's
(apparently) not a separate device, can we thus skip this change?  I
don't see much value in it and it doesn't simplify code.  The other
patches in this series I have no opinion about.

(note the parens in *(s->clkm) are redundant.  Also would be great if
your patches could maintain the indentation of the rest of the file
where it's not specified by the new coding style, this would reduce
inconsistency).

Cheers

Re: [Qemu-devel] [PATCH 5/6] hw/omap1.c: Separate clkm from omap_mpu_state

[Peter Maydell]

On 21 December 2011 01:38, andrzej zaborowski <balrogg@gmail.com> wrote:
> Since this sub device uses parts of the rest of mpu state, it's
> (apparently) not a separate device, can we thus skip this change?  I
> don't see much value in it and it doesn't simplify code.

If you like; I don't have a very strong feeling about it, I'm mostly
just trying to get patches out of my tree, so "drop patch" is as
good as "push to master" in that sense :-)

I do suspect that nested anonymous structs are going to be a pain
for VMState if we ever get to adding save/load support to omap3.

> (note the parens in *(s->clkm) are redundant.  Also would be great if
> your patches could maintain the indentation of the rest of the file
> where it's not specified by the new coding style, this would reduce
> inconsistency).

I mostly try not to make spurious indentation changes, but there
are a lot in the patches I inherited from the qemu-meego tree so
sometimes things slip through.

-- PMM

Re: [Qemu-devel] [PATCH 5/6] hw/omap1.c: Separate clkm from omap_mpu_state

[Peter Maydell]

On 21 December 2011 11:07, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 21 December 2011 01:38, andrzej zaborowski <balrogg@gmail.com> wrote:
>> Since this sub device uses parts of the rest of mpu state, it's
>> (apparently) not a separate device, can we thus skip this change?  I
>> don't see much value in it and it doesn't simplify code.
>
> If you like; I don't have a very strong feeling about it, I'm mostly
> just trying to get patches out of my tree, so "drop patch" is as
> good as "push to master" in that sense :-)

I'm going to drop this patch and just include 1-4,6 in the arm-devs.next
pullreq I'm putting together.

-- PMM