From: Mark Langsdorf <mark.langsdorf@calxeda.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, paul@codesourcery.com, rob.herring@calxeda.com
Subject: [Qemu-devel] [PATCH v4 0/7] various ARM fixes
Date: Tue, 27 Dec 2011 19:24:33 -0600 [thread overview]
Message-ID: <1325035480-20409-1-git-send-email-mark.langsdorf@calxeda.com> (raw)
This is a collection of fixes and additions to the models for various
ARM devices. These changes are needed to support the forthcoming
Calxeda Highbank SoC model.
Makefile.target | 2 +
hw/a9mpcore.c | 43 +++++-
hw/arm11mpcore.c | 14 +-
hw/arm_gic.c | 63 +++++---
hw/arm_l2x0.c | 183 ++++++++++++++++++++++
hw/arm_timer.c | 24 +++-
hw/armv7m_nvic.c | 7 +-
hw/realview_gic.c | 3 +-
hw/xgmac.c | 424 +++++++++++++++++++++++++++++++++++++++++++++++++++
target-arm/cpu.h | 1 +
target-arm/helper.c | 14 ++
11 files changed, 730 insertions(+), 48 deletions(-)
next reply other threads:[~2011-12-28 1:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-28 1:24 Mark Langsdorf [this message]
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 1/7] arm: add missing scu registers Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 2/7] arm: Set frequencies for arm_timer Mark Langsdorf
2011-12-28 11:46 ` Andreas Färber
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 3/7] arm: add dummy v7 cp15 config_base_register Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 4/7] arm: add dummy gic security registers Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 5/7] add L2x0/PL310 cache controller device Mark Langsdorf
2011-12-28 1:32 ` Peter Maydell
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 6/7] Add xgmac ethernet model Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 7/7] arm: make the number of GIC interrupts configurable Mark Langsdorf
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