From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:32944) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfiFt-0008Tk-13 for qemu-devel@nongnu.org; Tue, 27 Dec 2011 20:24:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RfiFr-000810-V3 for qemu-devel@nongnu.org; Tue, 27 Dec 2011 20:24:32 -0500 Received: from smtp201.dfw.emailsrvr.com ([67.192.241.201]:41526) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfiFr-00080W-JB for qemu-devel@nongnu.org; Tue, 27 Dec 2011 20:24:31 -0500 From: Mark Langsdorf Date: Tue, 27 Dec 2011 19:24:37 -0600 Message-Id: <1325035480-20409-5-git-send-email-mark.langsdorf@calxeda.com> In-Reply-To: <1325035480-20409-1-git-send-email-mark.langsdorf@calxeda.com> References: <1325035480-20409-1-git-send-email-mark.langsdorf@calxeda.com> Subject: [Qemu-devel] [PATCH v4 4/7] arm: add dummy gic security registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Mark Langsdorf , paul@codesourcery.com, rob.herring@calxeda.com From: Rob Herring Implement handling for the RAZ/WI gic security registers. Signed-off-by: Rob Herring Signed-off-by: Mark Langsdorf Reviewed-by: Peter Maydell --- Changes from v2, v3 None Changes from v1 Moved handling back inside the 0-0x100 block Added more clarifying comments hw/arm_gic.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 9b52119..0339cf5 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -282,6 +282,10 @@ static uint32_t gic_dist_readb(void *opaque, target_phys_addr_t offset) return ((GIC_NIRQ / 32) - 1) | ((NUM_CPU(s) - 1) << 5); if (offset < 0x08) return 0; + if (offset >= 0x80) { + /* Interrupt Security , RAZ/WI */ + return 0; + } #endif goto bad_reg; } else if (offset < 0x200) { @@ -413,6 +417,8 @@ static void gic_dist_writeb(void *opaque, target_phys_addr_t offset, DPRINTF("Distribution %sabled\n", s->enabled ? "En" : "Dis"); } else if (offset < 4) { /* ignored. */ + } else if (offset >= 0x80) { + /* Interrupt Security Registers, RAZ/WI */ } else { goto bad_reg; } -- 1.7.5.4