From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:43752) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RjWlK-000646-Tg for qemu-devel@nongnu.org; Sat, 07 Jan 2012 08:56:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RjWlJ-0000v8-VL for qemu-devel@nongnu.org; Sat, 07 Jan 2012 08:56:46 -0500 Received: from v220110690675601.yourvserver.net ([78.47.199.172]:56760) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RjWlJ-0000v2-NG for qemu-devel@nongnu.org; Sat, 07 Jan 2012 08:56:45 -0500 From: Stefan Weil Date: Thu, 5 Jan 2012 13:11:48 +0100 Message-Id: <1325765508-16066-1-git-send-email-sw@weilnetz.de> Subject: [Qemu-devel] [PATCH] target-sh4: Fix operands for fipr, ftrv instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Stefan Weil , Aurelien Jarno Coverity complained about right shifts of opcode (16, 18) which were larger than the size of opcode (16 bit). Using the correct shift values fixes this. Cc: Aurelien Jarno Signed-off-by: Stefan Weil --- target-sh4/translate.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index bad3577..2ecb236 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1864,8 +1864,8 @@ static void _decode_opc(DisasContext * ctx) CHECK_FPU_ENABLED if ((ctx->fpscr & FPSCR_PR) == 0) { TCGv m, n; - m = tcg_const_i32((ctx->opcode >> 16) & 3); - n = tcg_const_i32((ctx->opcode >> 18) & 3); + m = tcg_const_i32((ctx->opcode >> 8) & 3); + n = tcg_const_i32((ctx->opcode >> 10) & 3); gen_helper_fipr(m, n); tcg_temp_free(m); tcg_temp_free(n); @@ -1877,7 +1877,7 @@ static void _decode_opc(DisasContext * ctx) if ((ctx->opcode & 0x0300) == 0x0100 && (ctx->fpscr & FPSCR_PR) == 0) { TCGv n; - n = tcg_const_i32((ctx->opcode >> 18) & 3); + n = tcg_const_i32((ctx->opcode >> 10) & 3); gen_helper_ftrv(n); tcg_temp_free(n); return; -- 1.7.2.5