From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: qemu-stable@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 3/4] target-i386: fix dpps and dppd SSE2 instructions
Date: Sat, 7 Jan 2012 21:09:37 +0100 [thread overview]
Message-ID: <1325966978-940-4-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1325966978-940-1-git-send-email-aurelien@aurel32.net>
The helpers implemented dpps and dppd SSE instructions are not passing
the correct argument types to the softfloat functions. While they do
work anyway providing a correct behaviour, this patch fixes that.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
target-i386/ops_sse.h | 28 ++++++++++++++--------------
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h
index a185bfb..adfe822 100644
--- a/target-i386/ops_sse.h
+++ b/target-i386/ops_sse.h
@@ -1770,44 +1770,44 @@ SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
void glue(helper_dpps, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
{
- float32 iresult = 0 /*float32_zero*/;
+ float32 iresult = float32_zero;
if (mask & (1 << 4))
iresult = float32_add(iresult,
- float32_mul(d->L(0), s->L(0), &env->sse_status),
+ float32_mul(d->XMM_S(0), s->XMM_S(0), &env->sse_status),
&env->sse_status);
if (mask & (1 << 5))
iresult = float32_add(iresult,
- float32_mul(d->L(1), s->L(1), &env->sse_status),
+ float32_mul(d->XMM_S(1), s->XMM_S(1), &env->sse_status),
&env->sse_status);
if (mask & (1 << 6))
iresult = float32_add(iresult,
- float32_mul(d->L(2), s->L(2), &env->sse_status),
+ float32_mul(d->XMM_S(2), s->XMM_S(2), &env->sse_status),
&env->sse_status);
if (mask & (1 << 7))
iresult = float32_add(iresult,
- float32_mul(d->L(3), s->L(3), &env->sse_status),
+ float32_mul(d->XMM_S(3), s->XMM_S(3), &env->sse_status),
&env->sse_status);
- d->L(0) = (mask & (1 << 0)) ? iresult : 0 /*float32_zero*/;
- d->L(1) = (mask & (1 << 1)) ? iresult : 0 /*float32_zero*/;
- d->L(2) = (mask & (1 << 2)) ? iresult : 0 /*float32_zero*/;
- d->L(3) = (mask & (1 << 3)) ? iresult : 0 /*float32_zero*/;
+ d->XMM_S(0) = (mask & (1 << 0)) ? iresult : float32_zero;
+ d->XMM_S(1) = (mask & (1 << 1)) ? iresult : float32_zero;
+ d->XMM_S(2) = (mask & (1 << 2)) ? iresult : float32_zero;
+ d->XMM_S(3) = (mask & (1 << 3)) ? iresult : float32_zero;
}
void glue(helper_dppd, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
{
- float64 iresult = 0 /*float64_zero*/;
+ float64 iresult = float64_zero;
if (mask & (1 << 4))
iresult = float64_add(iresult,
- float64_mul(d->Q(0), s->Q(0), &env->sse_status),
+ float64_mul(d->XMM_D(0), s->XMM_D(0), &env->sse_status),
&env->sse_status);
if (mask & (1 << 5))
iresult = float64_add(iresult,
- float64_mul(d->Q(1), s->Q(1), &env->sse_status),
+ float64_mul(d->XMM_D(1), s->XMM_D(1), &env->sse_status),
&env->sse_status);
- d->Q(0) = (mask & (1 << 0)) ? iresult : 0 /*float64_zero*/;
- d->Q(1) = (mask & (1 << 1)) ? iresult : 0 /*float64_zero*/;
+ d->XMM_D(0) = (mask & (1 << 0)) ? iresult : float64_zero;
+ d->XMM_D(1) = (mask & (1 << 1)) ? iresult : float64_zero;
}
void glue(helper_mpsadbw, SUFFIX) (Reg *d, Reg *s, uint32_t offset)
--
1.7.7.3
next prev parent reply other threads:[~2012-01-07 20:09 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-07 20:09 [Qemu-devel] [PATCH 0/4] target-i386: Fix regressions introduced by the switch to softfloat Aurelien Jarno
2012-01-07 20:09 ` [Qemu-devel] [PATCH 1/4] target-i386: fix {min, max}{pd, ps, sd, ss} SSE2 instructions Aurelien Jarno
2012-01-07 20:22 ` Peter Maydell
2012-01-07 21:24 ` [Qemu-devel] [PATCH 1/4 v2] " Aurelien Jarno
2012-01-07 20:09 ` [Qemu-devel] [PATCH 2/4] target-i386: fix round{pd, " Aurelien Jarno
2012-01-07 20:09 ` Aurelien Jarno [this message]
2012-01-07 20:09 ` [Qemu-devel] [PATCH 4/4] target-i386: fix SSE rounding and flush to zero Aurelien Jarno
2012-01-12 5:37 ` Dong Xu Wang
2012-01-13 9:40 ` Markus Armbruster
2012-01-13 15:14 ` [Qemu-devel] [Qemu-stable] " Justin M. Forbes
2012-01-13 16:07 ` [Qemu-devel] " Aurelien Jarno
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