From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:39612) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RjcaP-0004Jc-Jg for qemu-devel@nongnu.org; Sat, 07 Jan 2012 15:09:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RjcaM-0001f0-Oy for qemu-devel@nongnu.org; Sat, 07 Jan 2012 15:09:53 -0500 From: Aurelien Jarno Date: Sat, 7 Jan 2012 21:09:37 +0100 Message-Id: <1325966978-940-4-git-send-email-aurelien@aurel32.net> In-Reply-To: <1325966978-940-1-git-send-email-aurelien@aurel32.net> References: <1325966978-940-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH 3/4] target-i386: fix dpps and dppd SSE2 instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Aurelien Jarno The helpers implemented dpps and dppd SSE instructions are not passing the correct argument types to the softfloat functions. While they do work anyway providing a correct behaviour, this patch fixes that. Signed-off-by: Aurelien Jarno --- target-i386/ops_sse.h | 28 ++++++++++++++-------------- 1 files changed, 14 insertions(+), 14 deletions(-) diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h index a185bfb..adfe822 100644 --- a/target-i386/ops_sse.h +++ b/target-i386/ops_sse.h @@ -1770,44 +1770,44 @@ SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP) void glue(helper_dpps, SUFFIX) (Reg *d, Reg *s, uint32_t mask) { - float32 iresult = 0 /*float32_zero*/; + float32 iresult = float32_zero; if (mask & (1 << 4)) iresult = float32_add(iresult, - float32_mul(d->L(0), s->L(0), &env->sse_status), + float32_mul(d->XMM_S(0), s->XMM_S(0), &env->sse_status), &env->sse_status); if (mask & (1 << 5)) iresult = float32_add(iresult, - float32_mul(d->L(1), s->L(1), &env->sse_status), + float32_mul(d->XMM_S(1), s->XMM_S(1), &env->sse_status), &env->sse_status); if (mask & (1 << 6)) iresult = float32_add(iresult, - float32_mul(d->L(2), s->L(2), &env->sse_status), + float32_mul(d->XMM_S(2), s->XMM_S(2), &env->sse_status), &env->sse_status); if (mask & (1 << 7)) iresult = float32_add(iresult, - float32_mul(d->L(3), s->L(3), &env->sse_status), + float32_mul(d->XMM_S(3), s->XMM_S(3), &env->sse_status), &env->sse_status); - d->L(0) = (mask & (1 << 0)) ? iresult : 0 /*float32_zero*/; - d->L(1) = (mask & (1 << 1)) ? iresult : 0 /*float32_zero*/; - d->L(2) = (mask & (1 << 2)) ? iresult : 0 /*float32_zero*/; - d->L(3) = (mask & (1 << 3)) ? iresult : 0 /*float32_zero*/; + d->XMM_S(0) = (mask & (1 << 0)) ? iresult : float32_zero; + d->XMM_S(1) = (mask & (1 << 1)) ? iresult : float32_zero; + d->XMM_S(2) = (mask & (1 << 2)) ? iresult : float32_zero; + d->XMM_S(3) = (mask & (1 << 3)) ? iresult : float32_zero; } void glue(helper_dppd, SUFFIX) (Reg *d, Reg *s, uint32_t mask) { - float64 iresult = 0 /*float64_zero*/; + float64 iresult = float64_zero; if (mask & (1 << 4)) iresult = float64_add(iresult, - float64_mul(d->Q(0), s->Q(0), &env->sse_status), + float64_mul(d->XMM_D(0), s->XMM_D(0), &env->sse_status), &env->sse_status); if (mask & (1 << 5)) iresult = float64_add(iresult, - float64_mul(d->Q(1), s->Q(1), &env->sse_status), + float64_mul(d->XMM_D(1), s->XMM_D(1), &env->sse_status), &env->sse_status); - d->Q(0) = (mask & (1 << 0)) ? iresult : 0 /*float64_zero*/; - d->Q(1) = (mask & (1 << 1)) ? iresult : 0 /*float64_zero*/; + d->XMM_D(0) = (mask & (1 << 0)) ? iresult : float64_zero; + d->XMM_D(1) = (mask & (1 << 1)) ? iresult : float64_zero; } void glue(helper_mpsadbw, SUFFIX) (Reg *d, Reg *s, uint32_t offset) -- 1.7.7.3