From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52987) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RlXYS-0000f4-By for qemu-devel@nongnu.org; Thu, 12 Jan 2012 22:11:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RlXYR-0006aa-1U for qemu-devel@nongnu.org; Thu, 12 Jan 2012 22:11:48 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 13 Jan 2012 04:09:22 +0100 Message-Id: <1326424168-15705-3-git-send-email-andreas.faerber@web.de> In-Reply-To: <1326424168-15705-1-git-send-email-andreas.faerber@web.de> References: <1325894809-17322-1-git-send-email-andreas.faerber@web.de> <1326424168-15705-1-git-send-email-andreas.faerber@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v3 2/8] prep_pci: Simplify I/O endianness List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , qemu-ppc@nongnu.org, Alexander Graf , "Michael S. Tsirkin" The prep PowerPC CPU is Big Endian. An explicit byte swap therefore effectively becomes Little Endian. Remove explicit byte swaps and mark as Little Endian. Signed-off-by: Andreas Färber Cc: Alexander Graf Cc: Michael S. Tsirkin --- hw/prep_pci.c | 6 +----- 1 files changed, 1 insertions(+), 5 deletions(-) diff --git a/hw/prep_pci.c b/hw/prep_pci.c index 741b273..edfb25d 100644 --- a/hw/prep_pci.c +++ b/hw/prep_pci.c @@ -53,14 +53,12 @@ static void PPC_PCIIO_writeb (void *opaque, target_phys_addr_t addr, uint32_t va static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr, uint32_t val) { PREPPCIState *s = opaque; - val = bswap16(val); pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 2); } static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr, uint32_t val) { PREPPCIState *s = opaque; - val = bswap32(val); pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 4); } @@ -77,7 +75,6 @@ static uint32_t PPC_PCIIO_readw (void *opaque, target_phys_addr_t addr) PREPPCIState *s = opaque; uint32_t val; val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 2); - val = bswap16(val); return val; } @@ -86,7 +83,6 @@ static uint32_t PPC_PCIIO_readl (void *opaque, target_phys_addr_t addr) PREPPCIState *s = opaque; uint32_t val; val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 4); - val = bswap32(val); return val; } @@ -95,7 +91,7 @@ static const MemoryRegionOps PPC_PCIIO_ops = { .read = { PPC_PCIIO_readb, PPC_PCIIO_readw, PPC_PCIIO_readl, }, .write = { PPC_PCIIO_writeb, PPC_PCIIO_writew, PPC_PCIIO_writel, }, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static int prep_map_irq(PCIDevice *pci_dev, int irq_num) -- 1.7.7