From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:55536) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RlmRD-0003zc-RG for qemu-devel@nongnu.org; Fri, 13 Jan 2012 14:05:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RlmR8-0006Oo-5v for qemu-devel@nongnu.org; Fri, 13 Jan 2012 14:05:19 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 13 Jan 2012 20:03:16 +0100 Message-Id: <1326481401-10519-4-git-send-email-andreas.faerber@web.de> In-Reply-To: <1326481401-10519-1-git-send-email-andreas.faerber@web.de> References: <1325894809-17322-1-git-send-email-andreas.faerber@web.de> <1326481401-10519-1-git-send-email-andreas.faerber@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v4 3/8] prep_pci: Update I/O to MemoryRegion ops List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , =?UTF-8?q?Beno=C3=AEt=20Canet?= , qemu-ppc@nongnu.org, Avi Kivity , "Michael S. Tsirkin" Convert to new-style read/write callbacks. Signed-off-by: Andreas Färber Reviewed-by: Alexander Graf Cc: Michael S. Tsirkin Cc: Avi Kivity Cc: Benoît Canet --- hw/prep_pci.c | 61 +++++++++++++++++++++----------------------------------- 1 files changed, 23 insertions(+), 38 deletions(-) diff --git a/hw/prep_pci.c b/hw/prep_pci.c index edfb25d..5970196 100644 --- a/hw/prep_pci.c +++ b/hw/prep_pci.c @@ -44,53 +44,38 @@ static inline uint32_t PPC_PCIIO_config(target_phys_addr_t addr) return (addr & 0x7ff) | (i << 11); } -static void PPC_PCIIO_writeb (void *opaque, target_phys_addr_t addr, uint32_t val) +static void ppc_pci_io_write(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned int size) { PREPPCIState *s = opaque; - pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 1); -} - -static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr, uint32_t val) -{ - PREPPCIState *s = opaque; - pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 2); -} - -static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr, uint32_t val) -{ - PREPPCIState *s = opaque; - pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 4); -} - -static uint32_t PPC_PCIIO_readb (void *opaque, target_phys_addr_t addr) -{ - PREPPCIState *s = opaque; - uint32_t val; - val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 1); - return val; -} - -static uint32_t PPC_PCIIO_readw (void *opaque, target_phys_addr_t addr) -{ - PREPPCIState *s = opaque; - uint32_t val; - val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 2); - return val; + switch (size) { + case 1: + case 2: + case 4: + pci_data_write(s->bus, PPC_PCIIO_config(addr), val, size); + break; + default: + abort(); + } } -static uint32_t PPC_PCIIO_readl (void *opaque, target_phys_addr_t addr) +static uint64_t ppc_pci_io_read(void *opaque, target_phys_addr_t addr, + unsigned int size) { PREPPCIState *s = opaque; - uint32_t val; - val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 4); - return val; + switch (size) { + case 1: + case 2: + case 4: + return pci_data_read(s->bus, PPC_PCIIO_config(addr), size); + default: + abort(); + } } static const MemoryRegionOps PPC_PCIIO_ops = { - .old_mmio = { - .read = { PPC_PCIIO_readb, PPC_PCIIO_readw, PPC_PCIIO_readl, }, - .write = { PPC_PCIIO_writeb, PPC_PCIIO_writew, PPC_PCIIO_writel, }, - }, + .read = ppc_pci_io_read, + .write = ppc_pci_io_write, .endianness = DEVICE_LITTLE_ENDIAN, }; -- 1.7.7