From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: android-virt@lists.cs.columbia.edu, patches@linaro.org
Subject: [Qemu-devel] [PATCH 07/12] hw/vexpress.c: Instantiate the motherboard CLCD
Date: Fri, 13 Jan 2012 20:52:44 +0000 [thread overview]
Message-ID: <1326487969-12462-8-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1326487969-12462-1-git-send-email-peter.maydell@linaro.org>
Instantiate the CLCD on the vexpress motherboard as well as one on
the daughterboard -- the A15 daughterboard does not have a CLCD
and so relies on the motherboard one.
At the moment QEMU doesn't provide infrastructure for selecting
which display device gets to actually show graphics -- the first
one registered is it. Fortunately this works for the major use
case (Linux): if the daughterboard has a CLCD it will come first
and be used, otherwise we fall back to the motherboard CLCD.
So we don't (currently) need to implement the control register
which allows software to tell the mux which video output to pass
through to the outside world.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/vexpress.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 9033b50..9860085 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -282,7 +282,7 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
/* VE_COMPACTFLASH: not modelled */
- /* VE_CLCD: not modelled (we use the daughterboard CLCD only) */
+ sysbus_create_simple("pl111", map[VE_CLCD], pic[14]);
/* VE_NORFLASH0: not modelled */
/* VE_NORFLASH0ALIAS: not modelled */
--
1.7.1
next prev parent reply other threads:[~2012-01-13 20:56 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-13 20:52 [Qemu-devel] [PATCH 00/12] Add support for Cortex-A15 and vexpress-a15 Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 01/12] vexpress, realview: Add (dummy) L2 cache controller Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 02/12] arm: make the number of GIC interrupts configurable Peter Maydell
2012-01-24 8:42 ` [Qemu-devel] [Android-virt] " Rusty Russell
2012-01-25 15:09 ` Peter Maydell
2012-01-27 0:33 ` Rusty Russell
2012-01-27 9:01 ` Peter Maydell
2012-02-19 23:06 ` [Qemu-devel] [PATCH 1/2] arm: clean up GIC constants Rusty Russell
2012-02-20 17:27 ` Peter Maydell
2012-02-21 2:33 ` Rusty Russell
2012-02-21 12:42 ` Peter Maydell
2012-02-19 23:07 ` [Qemu-devel] [PATCH] arm: make sure that number of irqs can be represented in GICD_TYPER Rusty Russell
2012-02-19 23:40 ` [Qemu-devel] [Android-virt] " Christoffer Dall
2012-02-20 3:52 ` Rusty Russell
2012-02-20 3:53 ` [Qemu-devel] [PATCH 3/2] " Rusty Russell
2012-02-21 2:33 ` [Qemu-devel] [PATCH 2/2] " Rusty Russell
2012-02-21 12:42 ` Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 03/12] hw/arm_boot.c: Make SMP boards specify address to poll in bootup loop Peter Maydell
2012-01-16 1:56 ` [Qemu-devel] [Android-virt] " Alexander Graf
2012-01-16 8:31 ` Peter Maydell
2012-01-16 23:31 ` andrzej zaborowski
2012-01-16 23:41 ` Peter Maydell
2012-01-17 1:16 ` [Qemu-devel] " andrzej zaborowski
2012-01-13 20:52 ` [Qemu-devel] [PATCH 04/12] hw/vexpress.c: Make motherboard peripheral memory map table-driven Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 05/12] hw/vexpress.c: Move secondary CPU boot code to SRAM Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 06/12] hw/vexpress.c: Factor out daughterboard-specific initialization Peter Maydell
2012-01-13 20:52 ` Peter Maydell [this message]
2012-01-13 20:52 ` [Qemu-devel] [PATCH 08/12] hw/a15mpcore.c: Add Cortex-A15 private peripheral model Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 09/12] Add dummy implementation of generic timer cp15 registers Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 10/12] Add Cortex-A15 CPU definition Peter Maydell
2012-01-23 18:12 ` [Qemu-devel] [Android-virt] " Peter Maydell
2012-01-24 7:59 ` [Qemu-devel] " Andreas Färber
2012-01-24 8:33 ` Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 11/12] arm_boot: Pass base address of GIC CPU interface, not whole GIC Peter Maydell
2012-01-13 20:52 ` [Qemu-devel] [PATCH 12/12] hw/vexpress.c: Add vexpress-a15 machine Peter Maydell
2012-01-13 20:57 ` [Qemu-devel] [PATCH 00/12] Add support for Cortex-A15 and vexpress-a15 Peter Maydell
2012-01-15 22:56 ` [Qemu-devel] [Android-virt] " Christoffer Dall
2012-01-17 19:08 ` Peter Maydell
2012-01-27 10:28 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1326487969-12462-8-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=android-virt@lists.cs.columbia.edu \
--cc=patches@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).