From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52032) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RmalD-0000c6-Ff for qemu-devel@nongnu.org; Sun, 15 Jan 2012 19:49:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rmal5-0000if-OK for qemu-devel@nongnu.org; Sun, 15 Jan 2012 19:49:14 -0500 Received: from cantor2.suse.de ([195.135.220.15]:58259 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rmal5-0000iM-1n for qemu-devel@nongnu.org; Sun, 15 Jan 2012 19:49:11 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 16 Jan 2012 01:46:56 +0100 Message-Id: <1326674823-13069-8-git-send-email-afaerber@suse.de> In-Reply-To: <1326674823-13069-1-git-send-email-afaerber@suse.de> References: <1326674823-13069-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 07/14] softfloat: Replace int16 type with int_fast16_t List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Anthony Liguori , Stefan Weil , Jan Kiszka , Blue Swirl , Christophe Lyon , malc , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Based on the following Coccinelle patch: @@ typedef int16, int_fast16_t; @@ -int16 +int_fast16_t Avoids a workaround for AIX. Add typedef for pre-10 Solaris. Signed-off-by: Andreas F=C3=A4rber Cc: malc Cc: Ben Taylor --- fpu/softfloat-macros.h | 18 ++++---- fpu/softfloat.c | 114 ++++++++++++++++++++++++------------------= ------ fpu/softfloat.h | 7 +-- osdep.h | 1 + 4 files changed, 69 insertions(+), 71 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index e82ce23..b5164af 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -55,7 +55,7 @@ these four paragraphs for those parts of this code that= are retained. | The result is stored in the location pointed to by `zPtr'. *-----------------------------------------------------------------------= -----*/ =20 -INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr= ) +INLINE void shift32RightJamming(uint32_t a, int_fast16_t count, uint32_t= *zPtr) { uint32_t z; =20 @@ -81,7 +81,7 @@ INLINE void shift32RightJamming( uint32_t a, int16 coun= t, uint32_t *zPtr ) | The result is stored in the location pointed to by `zPtr'. *-----------------------------------------------------------------------= -----*/ =20 -INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr= ) +INLINE void shift64RightJamming(uint64_t a, int_fast16_t count, uint64_t= *zPtr) { uint64_t z; =20 @@ -117,7 +117,7 @@ INLINE void shift64RightJamming( uint64_t a, int16 co= unt, uint64_t *zPtr ) =20 INLINE void shift64ExtraRightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z= 1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint= 64_t *z1Ptr) { uint64_t z0, z1; int8 negCount =3D ( - count ) & 63; @@ -154,7 +154,7 @@ INLINE void =20 INLINE void shift128Right( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z= 1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint= 64_t *z1Ptr) { uint64_t z0, z1; int8 negCount =3D ( - count ) & 63; @@ -189,7 +189,7 @@ INLINE void =20 INLINE void shift128RightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z= 1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint= 64_t *z1Ptr) { uint64_t z0, z1; int8 negCount =3D ( - count ) & 63; @@ -243,7 +243,7 @@ INLINE void uint64_t a0, uint64_t a1, uint64_t a2, - int16 count, + int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr, uint64_t *z2Ptr @@ -298,7 +298,7 @@ INLINE void =20 INLINE void shortShift128Left( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z= 1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint= 64_t *z1Ptr) { =20 *z1Ptr =3D a1<> 10) & 0x1f; } @@ -218,7 +218,7 @@ INLINE uint32_t extractFloat32Frac( float32 a ) | Returns the exponent bits of the single-precision floating-point value= `a'. *-----------------------------------------------------------------------= -----*/ =20 -INLINE int16 extractFloat32Exp( float32 a ) +INLINE int_fast16_t extractFloat32Exp(float32 a) { =20 return ( float32_val(a)>>23 ) & 0xFF; @@ -259,7 +259,7 @@ static float32 float32_squash_input_denormal(float32 = a STATUS_PARAM) *-----------------------------------------------------------------------= -----*/ =20 static void - normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSi= gPtr ) + normalizeFloat32Subnormal(uint32_t aSig, int_fast16_t *zExpPtr, uint32_= t *zSigPtr) { int8 shiftCount; =20 @@ -280,7 +280,7 @@ static void | significand. *-----------------------------------------------------------------------= -----*/ =20 -INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) +INLINE float32 packFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig) { =20 return make_float32( @@ -310,7 +310,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, u= int32_t zSig ) | Binary Floating-Point Arithmetic. *-----------------------------------------------------------------------= -----*/ =20 -static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSi= g STATUS_PARAM) +static float32 roundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32= _t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -376,7 +376,7 @@ static float32 roundAndPackFloat32( flag zSign, int16= zExp, uint32_t zSig STATUS *-----------------------------------------------------------------------= -----*/ =20 static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STA= TUS_PARAM) + normalizeRoundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zS= ig STATUS_PARAM) { int8 shiftCount; =20 @@ -400,7 +400,7 @@ INLINE uint64_t extractFloat64Frac( float64 a ) | Returns the exponent bits of the double-precision floating-point value= `a'. *-----------------------------------------------------------------------= -----*/ =20 -INLINE int16 extractFloat64Exp( float64 a ) +INLINE int_fast16_t extractFloat64Exp(float64 a) { =20 return ( float64_val(a)>>52 ) & 0x7FF; @@ -441,7 +441,7 @@ static float64 float64_squash_input_denormal(float64 = a STATUS_PARAM) *-----------------------------------------------------------------------= -----*/ =20 static void - normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSi= gPtr ) + normalizeFloat64Subnormal(uint64_t aSig, int_fast16_t *zExpPtr, uint64_= t *zSigPtr) { int8 shiftCount; =20 @@ -462,7 +462,7 @@ static void | significand. *-----------------------------------------------------------------------= -----*/ =20 -INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) +INLINE float64 packFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig) { =20 return make_float64( @@ -492,11 +492,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp,= uint64_t zSig ) | Binary Floating-Point Arithmetic. *-----------------------------------------------------------------------= -----*/ =20 -static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSi= g STATUS_PARAM) +static float64 roundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64= _t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; - int16 roundIncrement, roundBits; + int_fast16_t roundIncrement, roundBits; flag isTiny; =20 roundingMode =3D STATUS(float_rounding_mode); @@ -558,7 +558,7 @@ static float64 roundAndPackFloat64( flag zSign, int16= zExp, uint64_t zSig STATUS *-----------------------------------------------------------------------= -----*/ =20 static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STA= TUS_PARAM) + normalizeRoundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64_t zS= ig STATUS_PARAM) { int8 shiftCount; =20 @@ -1345,7 +1345,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) int32 float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; =20 @@ -1376,7 +1376,7 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; a =3D float32_squash_input_denormal(a STATUS_VAR); @@ -1416,10 +1416,10 @@ int32 float32_to_int32_round_to_zero( float32 a S= TATUS_PARAM ) | returned. *-----------------------------------------------------------------------= -----*/ =20 -int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) +int_fast16_t float32_to_int16_round_to_zero(float32 a STATUS_PARAM) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; =20 @@ -1468,7 +1468,7 @@ int16 float32_to_int16_round_to_zero( float32 a STA= TUS_PARAM ) int64 float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64, aSigExtra; a =3D float32_squash_input_denormal(a STATUS_VAR); @@ -1505,7 +1505,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; int64 z; @@ -1549,7 +1549,7 @@ int64 float32_to_int64_round_to_zero( float32 a STA= TUS_PARAM ) float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; a =3D float32_squash_input_denormal(a STATUS_VAR); =20 @@ -1579,7 +1579,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM = ) floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; =20 a =3D float32_squash_input_denormal(a STATUS_VAR); @@ -1609,7 +1609,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARA= M ) float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; =20 a =3D float32_squash_input_denormal(a STATUS_VAR); @@ -1639,7 +1639,7 @@ float128 float32_to_float128( float32 a STATUS_PARA= M ) float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t lastBitMask, roundBitsMask; int8 roundingMode; uint32_t z; @@ -1699,9 +1699,9 @@ float32 float32_round_to_int( float32 a STATUS_PARA= M) =20 static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_P= ARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; =20 aSig =3D extractFloat32Frac( a ); aExp =3D extractFloat32Exp( a ); @@ -1778,9 +1778,9 @@ static float32 addFloat32Sigs( float32 a, float32 b= , flag zSign STATUS_PARAM) =20 static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_P= ARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; =20 aSig =3D extractFloat32Frac( a ); aExp =3D extractFloat32Exp( a ); @@ -1898,7 +1898,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PA= RAM ) float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig; uint64_t zSig64; uint32_t zSig; @@ -1961,7 +1961,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PA= RAM ) float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; a =3D float32_squash_input_denormal(a STATUS_VAR); b =3D float32_squash_input_denormal(b STATUS_VAR); @@ -2025,7 +2025,7 @@ float32 float32_div( float32 a, float32 b STATUS_PA= RAM ) float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint32_t aSig, bSig; uint32_t q; uint64_t aSig64, bSig64, q64; @@ -2131,7 +2131,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PA= RAM ) float32 float32_muladd(float32 a, float32 b, float32 c, int flags STATUS= _PARAM) { flag aSign, bSign, cSign, zSign; - int16 aExp, bExp, cExp, pExp, zExp, expDiff; + int_fast16_t aExp, bExp, cExp, pExp, zExp, expDiff; uint32_t aSig, bSig, cSig; flag pInf, pZero, pSign; uint64_t pSig64, cSig64, zSig64; @@ -2333,7 +2333,7 @@ float32 float32_muladd(float32 a, float32 b, float3= 2 c, int flags STATUS_PARAM) float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint32_t aSig, zSig; uint64_t rem, term; a =3D float32_squash_input_denormal(a STATUS_VAR); @@ -2419,7 +2419,7 @@ static const float64 float32_exp2_coefficients[15] = =3D float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; float64 r, x, xn; int i; @@ -2467,7 +2467,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig, zSig, i; =20 a =3D float32_squash_input_denormal(a STATUS_VAR); @@ -2732,7 +2732,7 @@ int float32_unordered_quiet( float32 a, float32 b S= TATUS_PARAM ) int32 float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; a =3D float64_squash_input_denormal(a STATUS_VAR); =20 @@ -2760,7 +2760,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; a =3D float64_squash_input_denormal(a STATUS_VAR); @@ -2804,10 +2804,10 @@ int32 float64_to_int32_round_to_zero( float64 a S= TATUS_PARAM ) | returned. *-----------------------------------------------------------------------= -----*/ =20 -int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) +int_fast16_t float64_to_int16_round_to_zero(float64 a STATUS_PARAM) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; =20 @@ -2858,7 +2858,7 @@ int16 float64_to_int16_round_to_zero( float64 a STA= TUS_PARAM ) int64 float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, aSigExtra; a =3D float64_squash_input_denormal(a STATUS_VAR); =20 @@ -2901,7 +2901,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; int64 z; a =3D float64_squash_input_denormal(a STATUS_VAR); @@ -2951,7 +2951,7 @@ int64 float64_to_int64_round_to_zero( float64 a STA= TUS_PARAM ) float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; uint32_t zSig; a =3D float64_squash_input_denormal(a STATUS_VAR); @@ -2984,7 +2984,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM = ) | than the desired result exponent whenever `zSig' is a complete, normal= ized | significand. *-----------------------------------------------------------------------= -----*/ -static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig) +static float16 packFloat16(flag zSign, int_fast16_t zExp, uint16_t zSig) { return make_float16( (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig); @@ -2996,7 +2996,7 @@ static float16 packFloat16(flag zSign, int16 zExp, = uint16_t zSig) float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; =20 aSign =3D extractFloat16Sign(a); @@ -3026,7 +3026,7 @@ float32 float16_to_float32(float16 a, flag ieee STA= TUS_PARAM) float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; uint32_t mask; uint32_t increment; @@ -3127,7 +3127,7 @@ float16 float32_to_float16(float32 a, flag ieee STA= TUS_PARAM) floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; =20 a =3D float64_squash_input_denormal(a STATUS_VAR); @@ -3158,7 +3158,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARA= M ) float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; =20 a =3D float64_squash_input_denormal(a STATUS_VAR); @@ -3189,7 +3189,7 @@ float128 float64_to_float128( float64 a STATUS_PARA= M ) float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t lastBitMask, roundBitsMask; int8 roundingMode; uint64_t z; @@ -3262,9 +3262,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARA= M) =20 static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_P= ARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; =20 aSig =3D extractFloat64Frac( a ); aExp =3D extractFloat64Exp( a ); @@ -3341,9 +3341,9 @@ static float64 addFloat64Sigs( float64 a, float64 b= , flag zSign STATUS_PARAM ) =20 static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_P= ARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; =20 aSig =3D extractFloat64Frac( a ); aExp =3D extractFloat64Exp( a ); @@ -3461,7 +3461,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PA= RAM ) float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; =20 a =3D float64_squash_input_denormal(a STATUS_VAR); @@ -3522,7 +3522,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PA= RAM ) float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; uint64_t rem0, rem1; uint64_t term0, term1; @@ -3594,7 +3594,7 @@ float64 float64_div( float64 a, float64 b STATUS_PA= RAM ) float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint64_t aSig, bSig; uint64_t q, alternateASig; int64_t sigMean; @@ -3685,7 +3685,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PA= RAM ) float64 float64_muladd(float64 a, float64 b, float64 c, int flags STATUS= _PARAM) { flag aSign, bSign, cSign, zSign; - int16 aExp, bExp, cExp, pExp, zExp, expDiff; + int_fast16_t aExp, bExp, cExp, pExp, zExp, expDiff; uint64_t aSig, bSig, cSig; flag pInf, pZero, pSign; uint64_t pSig0, pSig1, cSig0, cSig1, zSig0, zSig1; @@ -3900,7 +3900,7 @@ float64 float64_muladd(float64 a, float64 b, float6= 4 c, int flags STATUS_PARAM) float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint64_t aSig, zSig, doubleZSig; uint64_t rem0, rem1, term0, term1; a =3D float64_squash_input_denormal(a STATUS_VAR); @@ -3951,7 +3951,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, aSig0, aSig1, zSig, i; a =3D float64_squash_input_denormal(a STATUS_VAR); =20 @@ -4428,7 +4428,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARA= M ) float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; =20 aSig =3D extractFloatx80Frac( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 4eab04c..dbdd390 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -57,9 +57,6 @@ these four paragraphs for those parts of this code that= are retained. typedef uint8_t flag; typedef uint8_t uint8; typedef int8_t int8; -#ifndef _AIX -typedef int int16; -#endif typedef unsigned int uint32; typedef signed int int32; typedef uint64_t uint64; @@ -260,7 +257,7 @@ extern const float16 float16_default_nan; /*----------------------------------------------------------------------= ------ | Software IEC/IEEE single-precision conversion routines. *-----------------------------------------------------------------------= -----*/ -int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +int_fast16_t float32_to_int16_round_to_zero(float32 STATUS_PARAM); uint_fast16_t float32_to_uint16_round_to_zero(float32 STATUS_PARAM); int32 float32_to_int32( float32 STATUS_PARAM ); int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); @@ -364,7 +361,7 @@ extern const float32 float32_default_nan; /*----------------------------------------------------------------------= ------ | Software IEC/IEEE double-precision conversion routines. *-----------------------------------------------------------------------= -----*/ -int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +int_fast16_t float64_to_int16_round_to_zero(float64 STATUS_PARAM); uint_fast16_t float64_to_uint16_round_to_zero(float64 STATUS_PARAM); int32 float64_to_int32( float64 STATUS_PARAM ); int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); diff --git a/osdep.h b/osdep.h index 8f45a96..0e560aa 100644 --- a/osdep.h +++ b/osdep.h @@ -14,6 +14,7 @@ /* uint_fast8_t and uint_fast16_t not in */ typedef unsigned char uint_fast8_t; typedef unsigned int uint_fast16_t; +typedef signed int int_fast16_t; #endif =20 #ifndef glue --=20 1.7.7