From: Mark Langsdorf <mark.langsdorf@calxeda.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, mark.langsdorf@calxeda.com,
i.mitsyanko@gmail.com, Rob Herring <rob.herring@calxeda.com>,
edgar.iglesias@gmail.com, afaerber@suse.de
Subject: [Qemu-devel] [PATCH v13 2/6] ahci: add support for non-PCI based controllers
Date: Fri, 20 Jan 2012 14:46:56 -0600 [thread overview]
Message-ID: <1327092420-10814-3-git-send-email-mark.langsdorf@calxeda.com> (raw)
In-Reply-To: <1327092420-10814-1-git-send-email-mark.langsdorf@calxeda.com>
From: Rob Herring <rob.herring@calxeda.com>
Add support for ahci on sysbus.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
Changes from v10-v12
None
Changes from v9
Changed typedef struct names to CamelCase
Changes from v7, v8
None
Changes from v5, v6
Skipped
Changes from v4
replaced all references to Plat|plat_ with sysbus_
made the number of ports into a qdev property
added dummy migration support
Changes from v3
Renamed plat-ahci to sysbus-ahci
Changes from v1, v2
Corrected indentation of PlatAHCIState members
Made plat_ahci_info into a single structure, not a list
hw/ide/ahci.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 0af201d..0309dd6 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -25,6 +25,7 @@
#include <hw/msi.h>
#include <hw/pc.h>
#include <hw/pci.h>
+#include <hw/sysbus.h>
#include "monitor.h"
#include "dma.h"
@@ -1214,3 +1215,46 @@ void ahci_reset(void *opaque)
ahci_reset_port(&d->ahci, i);
}
}
+
+typedef struct SysbusAHCIState {
+ SysBusDevice busdev;
+ AHCIState ahci;
+ uint32_t num_ports;
+} SysbusAHCIState;
+
+static const VMStateDescription vmstate_sysbus_ahci = {
+ .name = "sysbus-ahci",
+ .unmigratable = 1,
+};
+
+static int sysbus_ahci_init(SysBusDevice *dev)
+{
+ SysbusAHCIState *s = FROM_SYSBUS(SysbusAHCIState, dev);
+ ahci_init(&s->ahci, &dev->qdev, s->num_ports);
+
+ sysbus_init_mmio(dev, &s->ahci.mem);
+ sysbus_init_irq(dev, &s->ahci.irq);
+
+ qemu_register_reset(ahci_reset, &s->ahci);
+ return 0;
+}
+
+static SysBusDeviceInfo sysbus_ahci_info = {
+ .qdev.name = "sysbus-ahci",
+ .qdev.size = sizeof(SysbusAHCIState),
+ .qdev.vmsd = &vmstate_sysbus_ahci,
+ .qdev.props = (Property[]) {
+ DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, num_ports, 1),
+ DEFINE_PROP_END_OF_LIST(),
+ },
+ .init = sysbus_ahci_init,
+
+
+};
+
+static void sysbus_ahci_register(void)
+{
+ sysbus_register_withprop(&sysbus_ahci_info);
+}
+
+device_init(sysbus_ahci_register);
--
1.7.5.4
next prev parent reply other threads:[~2012-01-20 20:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-20 20:46 [Qemu-devel] [PATCH v13 0/6] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-20 20:46 ` [Qemu-devel] [PATCH v13 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-20 20:46 ` Mark Langsdorf [this message]
2012-01-20 20:46 ` [Qemu-devel] [PATCH v13 3/6] arm: add secondary cpu boot callbacks to arm_boot.c Mark Langsdorf
2012-01-23 14:24 ` Peter Maydell
2012-01-20 20:46 ` [Qemu-devel] [PATCH v13 4/6] arm_boot: support board IDs more than 16 bits wide Mark Langsdorf
2012-01-20 20:46 ` [Qemu-devel] [PATCH v13 5/6] arm: store the config_base_register during cpu_reset Mark Langsdorf
2012-01-23 14:41 ` Peter Maydell
2012-01-20 20:47 ` [Qemu-devel] [PATCH v13 6/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-23 14:34 ` Peter Maydell
2012-01-23 16:05 ` [Qemu-devel] [PATCH v14 0/6] arm: add support " Mark Langsdorf
2012-01-23 16:05 ` [Qemu-devel] [PATCH v14 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-23 16:05 ` [Qemu-devel] [PATCH v14 2/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-23 16:05 ` [Qemu-devel] [PATCH v14 3/6] arm: add secondary cpu boot callbacks to arm_boot.c Mark Langsdorf
2012-01-23 16:05 ` [Qemu-devel] [PATCH v14 4/6] arm_boot: support board IDs more than 16 bits wide Mark Langsdorf
2012-01-23 16:05 ` [Qemu-devel] [PATCH v14 5/6] arm: store the config_base_register during cpu_reset Mark Langsdorf
2012-01-23 17:37 ` Peter Maydell
2012-01-23 16:05 ` [Qemu-devel] [PATCH v14 6/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-23 17:43 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1327092420-10814-3-git-send-email-mark.langsdorf@calxeda.com \
--to=mark.langsdorf@calxeda.com \
--cc=afaerber@suse.de \
--cc=edgar.iglesias@gmail.com \
--cc=i.mitsyanko@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rob.herring@calxeda.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).