From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:38922) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rq4lU-0005NC-VV for qemu-devel@nongnu.org; Wed, 25 Jan 2012 10:28:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rq4lN-0005hu-58 for qemu-devel@nongnu.org; Wed, 25 Jan 2012 10:28:00 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:55085) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rq4lM-0005hb-LX for qemu-devel@nongnu.org; Wed, 25 Jan 2012 10:27:53 -0500 From: Peter Maydell Date: Wed, 25 Jan 2012 15:27:41 +0000 Message-Id: <1327505265-5976-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1327505265-5976-1-git-send-email-peter.maydell@linaro.org> References: <1327505265-5976-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 1/5] target-arm: Fix implementation of TLB invalidate operations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , Blue Swirl Cc: qemu-devel@nongnu.org Fix some bugs in the implementation of the TLB invalidate operations on ARM: * the 'invalidate all' op was not passing flush_global=1 to tlb_flush(); this doesn't have a practical effect since tlb_flush() currently ignores that argument, but is semantically incorrect * 'invalidate by address for all ASIDs' was implemented as flushing the whole TLB, which invalidates much more than strictly necessary. Use tlb_flush_page() instead. We also annotate the ops with the ARM ARM official acronyms. Signed-off-by: Peter Maydell --- target-arm/helper.c | 13 ++++++------- 1 files changed, 6 insertions(+), 7 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 00458fc..f11279e 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1610,18 +1610,17 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) break; case 8: /* MMU TLB control. */ switch (op2) { - case 0: /* Invalidate all. */ - tlb_flush(env, 0); + case 0: /* Invalidate all (TLBIALL) */ + tlb_flush(env, 1); break; - case 1: /* Invalidate single TLB entry. */ + case 1: /* Invalidate single TLB entry by MVA and ASID (TLBIMVA) */ tlb_flush_page(env, val & TARGET_PAGE_MASK); break; - case 2: /* Invalidate on ASID. */ + case 2: /* Invalidate by ASID (TLBIASID) */ tlb_flush(env, val == 0); break; - case 3: /* Invalidate single entry on MVA. */ - /* ??? This is like case 1, but ignores ASID. */ - tlb_flush(env, 1); + case 3: /* Invalidate single entry by MVA, all ASIDs (TLBIMVAA) */ + tlb_flush_page(env, val & TARGET_PAGE_MASK); break; default: goto bad_reg; -- 1.7.1