From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:40526) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RrUnP-0006Fb-GF for qemu-devel@nongnu.org; Sun, 29 Jan 2012 08:27:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RrUnN-0000Um-Kn for qemu-devel@nongnu.org; Sun, 29 Jan 2012 08:27:51 -0500 Received: from cantor2.suse.de ([195.135.220.15]:50569 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RrUnN-0000UP-AJ for qemu-devel@nongnu.org; Sun, 29 Jan 2012 08:27:49 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 29 Jan 2012 14:25:24 +0100 Message-Id: <1327843531-32403-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC 0/7] Introduce QOM CPU and use for target-arm List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Anthony Liguori , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Hello, Here's a series against master, pushing QOM beyond what I've seen on Anth= ony's qom-upstream and qom-rebase branches. It depends on the object_class_foreach() fix posted separately. Patch 1 is included here to show its use case in patch 5. Patch 2 suggests a way to start using QOM beyond "devices" in system emul= ation. Patch 3 suggests a way to integrate QOM into the user emulators as well. Patches 4-5 introduce a CPU class and prepare its use in system and user = mode. Patches 6-7 build upon this infrastructure and start using it for ARM. This series is surely not yet the final goal as discussed on IRC. It does= help with my and Peter's quest to further clean up the constantly growing mess surrounding ARM reset vs. one-time initialization though. The plan there is to get rid of the huge CPUID switch by moving the knowl= edge of reset values to CPU classes and by dumb copying of values from class t= o instance on reset. The latter for now requires to be able to obtain the ObjectClass matching a CPUState - in target-specific code this works by s= imple pointer arithmetic, encapsulated in a macro. So, in a spirit similar to Anthony's i440FX rework I'm posting this to ch= eck if I'm on the right track here before I start messing around with other targ= ets. Regards, Andreas Cc: Anthony Liguori Cc: Peter Maydell Cc: Paul Brook Andreas F=C3=A4rber (7): qom: Introduce object_class_is_abstract() qom: Register QOM infrastructure early qom: Add QOM support to user emulators qom: Introduce CPU class cpu: Introduce cpu_class_foreach() target-arm: Introduce QOM CPU and use for it CPUID lookup target-arm: Embed CPUARMState in QOM ARMCPU Makefile.objs | 1 + Makefile.target | 16 +++- Makefile.user | 1 + arch_init.c | 1 + bsd-user/main.c | 3 + darwin-user/main.c | 4 + hw/cpu.c | 52 +++++++++ include/qemu/cpu.h | 36 +++++++ include/qemu/object.h | 8 ++ linux-user/main.c | 3 + module.h | 4 + qom/object.c | 7 +- target-arm/cpu-core.c | 281 +++++++++++++++++++++++++++++++++++++++++++= ++++++ target-arm/cpu-core.h | 40 +++++++ target-arm/helper.c | 87 +++++----------- vl.c | 2 + 16 files changed, 480 insertions(+), 66 deletions(-) create mode 100644 hw/cpu.c create mode 100644 include/qemu/cpu.h create mode 100644 target-arm/cpu-core.c create mode 100644 target-arm/cpu-core.h --=20 1.7.7