From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:40603) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RrUnT-0006II-5k for qemu-devel@nongnu.org; Sun, 29 Jan 2012 08:27:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RrUnR-0000WU-CW for qemu-devel@nongnu.org; Sun, 29 Jan 2012 08:27:55 -0500 Received: from cantor2.suse.de ([195.135.220.15]:50588 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RrUnR-0000WN-4e for qemu-devel@nongnu.org; Sun, 29 Jan 2012 08:27:53 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 29 Jan 2012 14:25:31 +0100 Message-Id: <1327843531-32403-8-git-send-email-afaerber@suse.de> In-Reply-To: <1327843531-32403-1-git-send-email-afaerber@suse.de> References: <1327843531-32403-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC 7/7] target-arm: Embed CPUARMState in QOM ARMCPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Anthony Liguori , Richard Henderson , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook We g_malloc0()'ed CPUARMState ourself, and exec.c's cpu_copy() runs through cpu_init() as well, so we are at liberty to supply the CPUState any way we see fit. Having CPUARMState as field in the QOM CPU allows both to access env from an ARMCPU object and to access the QOM Object and its ObjectClass from an env pointer, in ARM code for now. The goal is to convert all CPUs to QOM and to use CPU objects in central places, especially once we have property support for Object. This will then allow to have TCG AREG0 point to target-specific fields where small immediate offsets are desired (as pointed out by rth) while allowing for common fields at known offsets from the base class. Having the CPUID in ARMCPUClass, we can set it from the realize function. Same for cpu_model_str, which is now the QOM class name. Signed-off-by: Andreas F=C3=A4rber Cc: Anthony Liguori Cc: Paul Brook Cc: Peter Maydell Cc: Richard Henderson --- target-arm/cpu-core.c | 13 +++++++++++++ target-arm/cpu-core.h | 7 +++++++ target-arm/helper.c | 13 ++++++------- 3 files changed, 26 insertions(+), 7 deletions(-) diff --git a/target-arm/cpu-core.c b/target-arm/cpu-core.c index 9761d8e..b1ac22c 100644 --- a/target-arm/cpu-core.c +++ b/target-arm/cpu-core.c @@ -234,12 +234,25 @@ static const struct ARMCPUDef arm_cpu_models[] =3D = { { } }; =20 +static void arm_cpu_realize(Object *obj) +{ + ARMCPU *cpu =3D ARM_CPU(obj); + ARMCPUClass *cpu_class =3D ARM_CPU_GET_CLASS(obj); + + memset(&cpu->env, 0, sizeof(CPUARMState)); + cpu_exec_init(&cpu->env); + + cpu->env.cpu_model_str =3D object_get_typename(obj); + cpu->env.cp15.c0_cpuid =3D cpu_class->id; +} + static void cpu_register(const struct ARMCPUDef *def) { TypeInfo type =3D { .name =3D def->name, .parent =3D TYPE_ARM_CPU, .instance_size =3D sizeof(ARMCPU), + .instance_init =3D arm_cpu_realize, .class_size =3D sizeof(ARMCPUClass), .class_init =3D def->class_init, }; diff --git a/target-arm/cpu-core.h b/target-arm/cpu-core.h index be4bbc3..08b6b2b 100644 --- a/target-arm/cpu-core.h +++ b/target-arm/cpu-core.h @@ -10,6 +10,7 @@ #define QEMU_ARM_CPU_CORE_H =20 #include "qemu/cpu.h" +#include "cpu.h" =20 #define TYPE_ARM_CPU "arm-cpu-core" #define ARM_CPU_CLASS(klass) \ @@ -27,7 +28,13 @@ typedef struct ARMCPUClass { =20 typedef struct ARMCPU { CPU parent_obj; + + /* TODO Inline this and split off common state */ + CPUARMState env; } ARMCPU; =20 +#define ENV_GET_OBJECT(e) \ + (Object *)((void *)(e) - offsetof(ARMCPU, env)) + =20 #endif diff --git a/target-arm/helper.c b/target-arm/helper.c index ece9635..1ffd7ba 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -400,7 +400,7 @@ static int vfp_gdb_set_reg(CPUState *env, uint8_t *bu= f, int reg) CPUARMState *cpu_arm_init(const char *cpu_model) { ObjectClass *klass; - ARMCPUClass *cpu_class; + ARMCPU *cpu; CPUARMState *env; static int inited =3D 0; =20 @@ -408,16 +408,14 @@ CPUARMState *cpu_arm_init(const char *cpu_model) if (klass =3D=3D NULL) { return NULL; } - cpu_class =3D ARM_CPU_CLASS(klass); - env =3D g_malloc0(sizeof(CPUARMState)); - cpu_exec_init(env); + cpu =3D ARM_CPU(object_new_with_type(klass->type)); + env =3D &cpu->env; + if (tcg_enabled() && !inited) { inited =3D 1; arm_translate_init(); } =20 - env->cpu_model_str =3D cpu_model; - env->cp15.c0_cpuid =3D cpu_class->id; cpu_reset(env); if (arm_feature(env, ARM_FEATURE_NEON)) { gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg, @@ -459,7 +457,8 @@ void arm_cpu_list(FILE *f, fprintf_function cpu_fprin= tf) =20 void cpu_arm_close(CPUARMState *env) { - g_free(env); + Object *obj =3D ENV_GET_OBJECT(env); + object_delete(obj); } =20 static int bad_mode_switch(CPUState *env, int mode) --=20 1.7.7