* [Qemu-devel] PCI: Add PCI_EXP_TYPE_PCIE_BRIDGE value
@ 2012-02-21 16:22 Anthony PERARD
2012-02-23 20:09 ` Jesse Barnes
0 siblings, 1 reply; 2+ messages in thread
From: Anthony PERARD @ 2012-02-21 16:22 UTC (permalink / raw)
To: linux-kernel
Cc: Anthony PERARD, linux-pci, QEMU-devel, Jesse Barnes,
Michael S . Tsirkin
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
---
include/linux/pci_regs.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index e41a10f..4b608f5 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -391,6 +391,7 @@
#define PCI_EXP_TYPE_UPSTREAM 0x5 /* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */
+#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8 /* PCI/PCI-X to PCIE Bridge */
#define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */
#define PCI_EXP_TYPE_RC_EC 0xa /* Root Complex Event Collector */
#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */
--
tg: (27e74da..) add-new-pci-value (depends on: master)
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] PCI: Add PCI_EXP_TYPE_PCIE_BRIDGE value
2012-02-21 16:22 [Qemu-devel] PCI: Add PCI_EXP_TYPE_PCIE_BRIDGE value Anthony PERARD
@ 2012-02-23 20:09 ` Jesse Barnes
0 siblings, 0 replies; 2+ messages in thread
From: Jesse Barnes @ 2012-02-23 20:09 UTC (permalink / raw)
To: Anthony PERARD; +Cc: QEMU-devel, linux-pci, linux-kernel, Michael S . Tsirkin
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On Tue, 21 Feb 2012 16:22:10 +0000
Anthony PERARD <anthony.perard@citrix.com> wrote:
> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
>
> ---
> include/linux/pci_regs.h | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
> index e41a10f..4b608f5 100644
> --- a/include/linux/pci_regs.h
> +++ b/include/linux/pci_regs.h
> @@ -391,6 +391,7 @@
> #define PCI_EXP_TYPE_UPSTREAM 0x5 /* Upstream Port */
> #define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */
> #define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */
> +#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8 /* PCI/PCI-X to PCIE Bridge */
> #define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */
> #define PCI_EXP_TYPE_RC_EC 0xa /* Root Complex Event Collector */
> #define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */
Applied, thanks.
--
Jesse Barnes, Intel Open Source Technology Center
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