From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3RZE-0005ly-Hy for qemu-devel@nongnu.org; Fri, 02 Mar 2012 07:26:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S3RZ9-0006Xs-J3 for qemu-devel@nongnu.org; Fri, 02 Mar 2012 07:26:36 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:39002) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3RZ9-0006XY-9P for qemu-devel@nongnu.org; Fri, 02 Mar 2012 07:26:31 -0500 From: Peter Maydell Date: Fri, 2 Mar 2012 12:07:05 +0000 Message-Id: <1330690025-7611-5-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1330690025-7611-1-git-send-email-peter.maydell@linaro.org> References: <1330690025-7611-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 4/4] hw/arm11mpcore: Fix broken realview_mpcore/arm11mpcore_priv properties List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-devel@nongnu.org, Paul Brook Fix confusion in the Property arrays for the "arm11mpcore_priv" (per-CPU devices for the ARM11MPcore CPU) and "realview_mpcore" (realview-eb board specific device encapsulating CPU and some extra interrupt controllers) -- the num-irq property was defined on the wrong device and the mpcore_rirq_properties were defined as offsets in the wrong structure. The effect was that the realview-eb-mpcore machine would abort on startup trying to allocate an insane amount of memory. (This bug was introduced in the QOM conversion in commit 999e12bb.) Signed-off-by: Peter Maydell --- hw/arm11mpcore.c | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/arm11mpcore.c b/hw/arm11mpcore.c index 102348b..c67b70f 100644 --- a/hw/arm11mpcore.c +++ b/hw/arm11mpcore.c @@ -202,16 +202,7 @@ static int realview_mpcore_init(SysBusDevice *dev) } static Property mpcore_rirq_properties[] = { - DEFINE_PROP_UINT32("num-cpu", mpcore_priv_state, num_cpu, 1), - /* The ARM11 MPCORE TRM says the on-chip controller may have - * anything from 0 to 224 external interrupt IRQ lines (with another - * 32 internal). We default to 32+32, which is the number provided by - * the ARM11 MPCore test chip in the Realview Versatile Express - * coretile. Other boards may differ and should set this property - * appropriately. Some Linux kernels may not boot if the hardware - * has more IRQ lines than the kernel expects. - */ - DEFINE_PROP_UINT32("num-irq", mpcore_priv_state, num_irq, 64), + DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1), DEFINE_PROP_END_OF_LIST(), }; @@ -233,6 +224,15 @@ static TypeInfo mpcore_rirq_info = { static Property mpcore_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", mpcore_priv_state, num_cpu, 1), + /* The ARM11 MPCORE TRM says the on-chip controller may have + * anything from 0 to 224 external interrupt IRQ lines (with another + * 32 internal). We default to 32+32, which is the number provided by + * the ARM11 MPCore test chip in the Realview Versatile Express + * coretile. Other boards may differ and should set this property + * appropriately. Some Linux kernels may not boot if the hardware + * has more IRQ lines than the kernel expects. + */ + DEFINE_PROP_UINT32("num-irq", mpcore_priv_state, num_irq, 64), DEFINE_PROP_END_OF_LIST(), }; -- 1.7.1