From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45015) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dCU-0002bw-5o for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7dC9-0000wf-Ct for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:25 -0400 Received: from cantor2.suse.de ([195.135.220.15]:54168 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dC8-0000un-Vp for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:05 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 02:39:54 +0100 Message-Id: <1331689198-11076-4-git-send-email-afaerber@suse.de> In-Reply-To: <1331689198-11076-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331689198-11076-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 3/7] target-unicore32: QOM'ify CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= Embed CPUUniCore32State into UniCore32CPU. Contributed under GPLv2+. Signed-off-by: Andreas F=C3=A4rber --- Makefile.target | 1 + target-unicore32/cpu-qom.h | 72 ++++++++++++++++++++++++++++++++++ target-unicore32/cpu.c | 91 ++++++++++++++++++++++++++++++++++++++= ++++++ target-unicore32/cpu.h | 1 + target-unicore32/helper.c | 43 +++----------------- 5 files changed, 172 insertions(+), 36 deletions(-) create mode 100644 target-unicore32/cpu-qom.h create mode 100644 target-unicore32/cpu.c diff --git a/Makefile.target b/Makefile.target index cbf62c0..7033df0 100644 --- a/Makefile.target +++ b/Makefile.target @@ -94,6 +94,7 @@ libobj-y +=3D cpu_init.o endif libobj-$(TARGET_SPARC) +=3D int32_helper.o libobj-$(TARGET_SPARC64) +=3D int64_helper.o +libobj-$(TARGET_UNICORE32) +=3D cpu.o =20 libobj-y +=3D disas.o libobj-$(CONFIG_TCI_DIS) +=3D tci-dis.o diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h new file mode 100644 index 0000000..afe47e8 --- /dev/null +++ b/target-unicore32/cpu-qom.h @@ -0,0 +1,72 @@ +/* + * QEMU UniCore32 CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see + * + */ +#ifndef QEMU_UC32_CPU_QOM_H +#define QEMU_UC32_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#define TYPE_UNICORE32_CPU "unicore32-cpu" + +#define UNICORE32_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(UniCore32CPUClass, (klass), TYPE_UNICORE32_CPU) +#define UNICORE32_CPU(obj) \ + OBJECT_CHECK(UniCore32CPU, (obj), TYPE_UNICORE32_CPU) +#define UNICORE32_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(UniCore32CPUClass, (obj), TYPE_UNICORE32_CPU) + +/** + * UniCore32CPUClass: + * + * A UniCore32 CPU model. + */ +typedef struct UniCore32CPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + struct { + uint32_t c0_cpuid; + } cp0; +} UniCore32CPUClass; + +/** + * UniCore32CPU: + * @env: Legacy CPU state. + * + * A UniCore32 CPU. + */ +typedef struct UniCore32CPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUUniCore32State env; +} UniCore32CPU; + +static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env) +{ + return UNICORE32_CPU(container_of(env, UniCore32CPU, env)); +} + +#define ENV_GET_CPU(e) CPU(uc32_env_get_cpu(e)) + + +#endif diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c new file mode 100644 index 0000000..b89a1c6 --- /dev/null +++ b/target-unicore32/cpu.c @@ -0,0 +1,91 @@ +/* + * QEMU UniCore32 CPU + * + * Copyright (c) 2010-2011 GUAN Xue-tao + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "cpu-qom.h" +#include "qemu-common.h" + +/* CPU models */ + +typedef struct UniCore32CPUInfo { + const char *name; + uint32_t cp0_c0_cpuid; +} UniCore32CPUInfo; + +static const UniCore32CPUInfo uc32_cpus[] =3D { + { + .name =3D "UniCore-II", + .cp0_c0_cpuid =3D 0x40010863, + }, + { + .name =3D "any", + .cp0_c0_cpuid =3D 0xffffffff, + } +}; + +static void uc32_cpu_initfn(Object *obj) +{ + UniCore32CPU *cpu =3D UNICORE32_CPU(obj); + UniCore32CPUClass *klass =3D UNICORE32_CPU_GET_CLASS(cpu); + CPUUniCore32State *env =3D &cpu->env; + + memset(env, 0, sizeof(CPUUniCore32State)); + cpu_exec_init(env); + env->cpu_model_str =3D object_get_typename(obj); + env->cp0.c0_cpuid =3D klass->cp0.c0_cpuid; + + env->uncached_asr =3D ASR_MODE_USER; + env->regs[31] =3D 0; + + tlb_flush(env, 1); +} + +static void uc32_cpu_class_init(ObjectClass *klass, void *data) +{ + UniCore32CPUClass *k =3D UNICORE32_CPU_CLASS(klass); + const UniCore32CPUInfo *info =3D data; + + k->cp0.c0_cpuid =3D info->cp0_c0_cpuid; +} + +static void uc32_register_cpu(const UniCore32CPUInfo *info) +{ + TypeInfo type =3D { + .name =3D info->name, + .parent =3D TYPE_UNICORE32_CPU, + .instance_size =3D sizeof(UniCore32CPU), + .class_size =3D sizeof(UniCore32CPUClass), + .class_init =3D uc32_cpu_class_init, + .class_data =3D (void *)info, + }; + + type_register_static(&type); +} + +static const TypeInfo uc32_cpu_info =3D { + .name =3D TYPE_UNICORE32_CPU, + .parent =3D TYPE_CPU, + .instance_size =3D sizeof(UniCore32CPU), + .instance_init =3D uc32_cpu_initfn, + .abstract =3D true, + .class_size =3D sizeof(UniCore32CPUClass), +}; + +static void uc32_cpu_register_types(void) +{ + int i; + + type_register_static(&uc32_cpu_info); + for (i =3D 0; i < ARRAY_SIZE(uc32_cpus); i++) { + uc32_register_cpu(&uc32_cpus[i]); + } +} + +type_init(uc32_cpu_register_types) diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index 9cbee7a..1ddd272 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -158,6 +158,7 @@ static inline void cpu_set_tls(CPUUniCore32State *env= , target_ulong newtls) } =20 #include "cpu-all.h" +#include "cpu-qom.h" #include "exec-all.h" =20 static inline void cpu_pc_from_tb(CPUUniCore32State *env, TranslationBlo= ck *tb) diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c index 6af492d..44b7842 100644 --- a/target-unicore32/helper.c +++ b/target-unicore32/helper.c @@ -16,43 +16,20 @@ static inline void set_feature(CPUUniCore32State *env= , int feature) env->features |=3D feature; } =20 -struct uc32_cpu_t { - uint32_t id; - const char *name; -}; - -static const struct uc32_cpu_t uc32_cpu_names[] =3D { - { UC32_CPUID_UCV2, "UniCore-II"}, - { UC32_CPUID_ANY, "any"}, - { 0, NULL} -}; - -/* return 0 if not found */ -static uint32_t uc32_cpu_find_by_name(const char *name) -{ - int i; - uint32_t id; - - id =3D 0; - for (i =3D 0; uc32_cpu_names[i].name; i++) { - if (strcmp(name, uc32_cpu_names[i].name) =3D=3D 0) { - id =3D uc32_cpu_names[i].id; - break; - } - } - return id; -} - CPUUniCore32State *uc32_cpu_init(const char *cpu_model) { + UniCore32CPU *cpu; CPUUniCore32State *env; uint32_t id; static int inited =3D 1; =20 - env =3D g_malloc0(sizeof(CPUUniCore32State)); - cpu_exec_init(env); + if (object_class_by_name(cpu_model) =3D=3D NULL) { + return NULL; + } + cpu =3D UNICORE32_CPU(object_new(cpu_model)); + env =3D &cpu->env; =20 - id =3D uc32_cpu_find_by_name(cpu_model); + id =3D env->cp0.c0_cpuid; switch (id) { case UC32_CPUID_UCV2: set_feature(env, UC32_HWCAP_CMOV); @@ -69,17 +46,11 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_mode= l) cpu_abort(env, "Bad CPU ID: %x\n", id); } =20 - env->cpu_model_str =3D cpu_model; - env->cp0.c0_cpuid =3D id; - env->uncached_asr =3D ASR_MODE_USER; - env->regs[31] =3D 0; - if (inited) { inited =3D 0; uc32_translate_init(); } =20 - tlb_flush(env, 1); qemu_init_vcpu(env); return env; } --=20 1.7.7