From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45060) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dCX-0002kv-1d for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7dCA-0000yM-NC for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:28 -0400 Received: from cantor2.suse.de ([195.135.220.15]:54173 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7dCA-0000xa-Dh for qemu-devel@nongnu.org; Tue, 13 Mar 2012 21:40:06 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 02:39:57 +0100 Message-Id: <1331689198-11076-7-git-send-email-afaerber@suse.de> In-Reply-To: <1331689198-11076-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331689198-11076-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 6/7] target-unicore32: Store feature flags in UniCore32CPUClass List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= Contributed under GPLv2+. Signed-off-by: Andreas F=C3=A4rber --- target-unicore32/cpu-qom.h | 3 +++ target-unicore32/cpu.c | 9 +++++++++ target-unicore32/helper.c | 9 --------- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h index 4d730f0..c8178a5 100644 --- a/target-unicore32/cpu-qom.h +++ b/target-unicore32/cpu-qom.h @@ -34,6 +34,7 @@ =20 /** * UniCore32CPUClass: + * @features: Internal CPU feature flags. * * A UniCore32 CPU model. */ @@ -47,6 +48,8 @@ typedef struct UniCore32CPUClass { uint32_t c0_cachetype; uint32_t c1_sys; } cp0; + + uint32_t features; } UniCore32CPUClass; =20 /** diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index fa5c280..d4b47d6 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -19,18 +19,25 @@ typedef struct UniCore32CPUInfo { uint32_t cp0_c0_cpuid; uint32_t cp0_c0_cachetype; uint32_t cp0_c1_sys; + uint32_t features; } UniCore32CPUInfo; =20 +#define UC32_FEATURE(feature) (1u << feature) + static const UniCore32CPUInfo uc32_cpus[] =3D { { .name =3D "UniCore-II", .cp0_c0_cpuid =3D 0x40010863, .cp0_c0_cachetype =3D 0x1dd20d2, .cp0_c1_sys =3D 0x00090078, + .features =3D UC32_FEATURE(UC32_HWCAP_CMOV) | + UC32_FEATURE(UC32_HWCAP_UCF64), }, { .name =3D "any", .cp0_c0_cpuid =3D 0xffffffff, + .features =3D UC32_FEATURE(UC32_HWCAP_CMOV) | + UC32_FEATURE(UC32_HWCAP_UCF64), } }; =20 @@ -46,6 +53,7 @@ static void uc32_cpu_initfn(Object *obj) env->cp0.c0_cpuid =3D klass->cp0.c0_cpuid; env->cp0.c0_cachetype =3D klass->cp0.c0_cachetype; env->cp0.c1_sys =3D klass->cp0.c1_sys; + env->features =3D klass->features; =20 env->uncached_asr =3D ASR_MODE_USER; env->regs[31] =3D 0; @@ -61,6 +69,7 @@ static void uc32_cpu_class_init(ObjectClass *klass, voi= d *data) k->cp0.c0_cpuid =3D info->cp0_c0_cpuid; k->cp0.c0_cachetype =3D info->cp0_c0_cachetype; k->cp0.c1_sys =3D info->cp0_c1_sys; + k->features =3D info->features; } =20 static void uc32_register_cpu(const UniCore32CPUInfo *info) diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c index ba9318b..fb6713c 100644 --- a/target-unicore32/helper.c +++ b/target-unicore32/helper.c @@ -11,11 +11,6 @@ #include "helper.h" #include "host-utils.h" =20 -static inline void set_feature(CPUUniCore32State *env, int feature) -{ - env->features |=3D feature; -} - CPUUniCore32State *uc32_cpu_init(const char *cpu_model) { UniCore32CPU *cpu; @@ -32,13 +27,9 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model= ) id =3D env->cp0.c0_cpuid; switch (id) { case UC32_CPUID_UCV2: - set_feature(env, UC32_HWCAP_CMOV); - set_feature(env, UC32_HWCAP_UCF64); env->ucf64.xregs[UC32_UCF64_FPSCR] =3D 0; break; case UC32_CPUID_ANY: /* For userspace emulation. */ - set_feature(env, UC32_HWCAP_CMOV); - set_feature(env, UC32_HWCAP_UCF64); break; default: cpu_abort(env, "Bad CPU ID: %x\n", id); --=20 1.7.7