From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:56854) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7sOn-0006Iv-G4 for qemu-devel@nongnu.org; Wed, 14 Mar 2012 13:54:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7sOO-0002dY-6b for qemu-devel@nongnu.org; Wed, 14 Mar 2012 13:54:09 -0400 Received: from cantor2.suse.de ([195.135.220.15]:51041 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7sON-0002cj-Q8 for qemu-devel@nongnu.org; Wed, 14 Mar 2012 13:53:44 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 18:53:32 +0100 Message-Id: <1331747617-7837-9-git-send-email-afaerber@suse.de> In-Reply-To: <1331747617-7837-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331747617-7837-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [RFC 08/12] target-cris: QOM'ify CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , =?UTF-8?q?Andreas=20F=C3=A4rber?= Let cris_cpu_list() enumerate CPU classes sorted by version. Signed-off-by: Andreas F=C3=A4rber --- Makefile.target | 1 + target-cris/cpu-qom.h | 73 ++++++++++++++++++++++++ target-cris/cpu.c | 144 +++++++++++++++++++++++++++++++++++++++++= ++++++ target-cris/cpu.h | 2 + target-cris/translate.c | 93 ++++++++++++++---------------- 5 files changed, 264 insertions(+), 49 deletions(-) create mode 100644 target-cris/cpu-qom.h create mode 100644 target-cris/cpu.c diff --git a/Makefile.target b/Makefile.target index c655091..3b7a4da 100644 --- a/Makefile.target +++ b/Makefile.target @@ -89,6 +89,7 @@ libobj-$(CONFIG_NEED_MMU) +=3D mmu.o libobj-$(TARGET_ARM) +=3D neon_helper.o iwmmxt_helper.o libobj-$(TARGET_ALPHA) +=3D cpu.o libobj-$(TARGET_ARM) +=3D cpu.o +libobj-$(TARGET_CRIS) +=3D cpu.o libobj-$(TARGET_M68K) +=3D cpu.o ifeq ($(TARGET_BASE_ARCH), mips) libobj-y +=3D cpu.o diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h new file mode 100644 index 0000000..bbd0c71 --- /dev/null +++ b/target-cris/cpu-qom.h @@ -0,0 +1,73 @@ +/* + * QEMU CRIS CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ +#ifndef QEMU_CRIS_CPU_QOM_H +#define QEMU_CRIS_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#define TYPE_CRIS_CPU "cris-cpu" + +#define CRIS_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(CRISCPUClass, (klass), TYPE_CRIS_CPU) +#define CRIS_CPU(obj) \ + OBJECT_CHECK(CRISCPU, (obj), TYPE_CRIS_CPU) +#define CRIS_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(CRISCPUClass, (obj), TYPE_CRIS_CPU) + +/** + * CRISCPUClass: + * @parent_reset: The parent class' reset handler. + * + * A CRIS CPU model. + */ +typedef struct CRISCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + void (*parent_reset)(CPUState *cpu); + + uint32_t vr; +} CRISCPUClass; + +/** + * CRISCPU: + * @env: Legacy CPU state. + * + * A CRIS CPU. + */ +typedef struct CRISCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUCRISState env; +} CRISCPU; + +static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) +{ + return CRIS_CPU(container_of(env, CRISCPU, env)); +} + +#define ENV_GET_CPU(e) CPU(cris_env_get_cpu(e)) + + +#endif diff --git a/target-cris/cpu.c b/target-cris/cpu.c new file mode 100644 index 0000000..01bce90 --- /dev/null +++ b/target-cris/cpu.c @@ -0,0 +1,144 @@ +/* + * QEMU CRIS CPU + * + * Copyright (c) 2008 AXIS Communications AB + * Written by Edgar E. Iglesias. + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ + +#include "cpu-qom.h" +#include "qemu-common.h" +#include "mmu.h" + +static void cris_cpu_reset(CPUState *c) +{ + CRISCPU *cpu =3D CRIS_CPU(c); + CRISCPUClass *klass =3D CRIS_CPU_GET_CLASS(cpu); + CPUCRISState *env =3D &cpu->env; + + if (qemu_loglevel_mask(CPU_LOG_RESET)) { + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); + log_cpu_state(env, 0); + } + + klass->parent_reset(c); + + memset(env, 0, offsetof(CPUCRISState, breakpoints)); + env->pregs[PR_VR] =3D klass->vr; + tlb_flush(env, 1); + +#if defined(CONFIG_USER_ONLY) + /* start in user mode with interrupts enabled. */ + env->pregs[PR_CCS] |=3D U_FLAG | I_FLAG | P_FLAG; +#else + cris_mmu_init(env); + env->pregs[PR_CCS] =3D 0; +#endif +} + +/* CPU models */ + +typedef struct CRISCPUInfo { + const char *name; + uint32_t vr; +} CRISCPUInfo; + +static const CRISCPUInfo cris_cpus[] =3D { + { + .name =3D "crisv8", + .vr =3D 8, + }, + { + .name =3D "crisv9", + .vr =3D 9, + }, + { + .name =3D "crisv10", + .vr =3D 10, + }, + { + .name =3D "crisv11", + .vr =3D 11, + }, + { + .name =3D "crisv32", + .vr =3D 32, + }, +}; + +static void cris_cpu_initfn(Object *obj) +{ + CRISCPU *cpu =3D CRIS_CPU(obj); + CRISCPUClass *klass =3D CRIS_CPU_GET_CLASS(cpu); + CPUCRISState *env =3D &cpu->env; + + memset(env, 0, sizeof(*env)); + cpu_exec_init(env); + env->cpu_model_str =3D object_get_typename(obj); + + env->pregs[PR_VR] =3D klass->vr; + + cpu_reset(CPU(cpu)); +} + +static void cris_cpu_class_init(ObjectClass *klass, void *data) +{ + CPUClass *cpu_class =3D CPU_CLASS(klass); + CRISCPUClass *k =3D CRIS_CPU_CLASS(klass); + const CRISCPUInfo *info =3D data; + + k->parent_reset =3D cpu_class->reset; + cpu_class->reset =3D cris_cpu_reset; + + k->vr =3D info->vr; +} + +static void cpu_register(const CRISCPUInfo *info) +{ + TypeInfo type =3D { + .name =3D info->name, + .parent =3D TYPE_CRIS_CPU, + .instance_size =3D sizeof(CRISCPU), + .instance_init =3D cris_cpu_initfn, + .class_size =3D sizeof(CRISCPUClass), + .class_init =3D cris_cpu_class_init, + .class_data =3D (void *)info, + }; + + type_register_static(&type); +} + +static const TypeInfo cris_cpu_type_info =3D { + .name =3D TYPE_CRIS_CPU, + .parent =3D TYPE_CPU, + .instance_size =3D sizeof(CRISCPU), + .abstract =3D true, + .class_size =3D sizeof(CRISCPUClass), +}; + +static void cris_cpu_register_types(void) +{ + int i; + + type_register_static(&cris_cpu_type_info); + for (i =3D 0; i < ARRAY_SIZE(cris_cpus); i++) { + cpu_register(&cris_cpus[i]); + } +} + +type_init(cris_cpu_register_types) diff --git a/target-cris/cpu.h b/target-cris/cpu.h index 31899c2..5449cc4 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -169,6 +169,8 @@ typedef struct CPUCRISState { void *load_info; } CPUCRISState; =20 +#include "cpu-qom.h" + CPUCRISState *cpu_cris_init(const char *cpu_model); int cpu_cris_exec(CPUCRISState *s); void cpu_cris_close(CPUCRISState *s); diff --git a/target-cris/translate.c b/target-cris/translate.c index 7224f46..4097ecd 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3470,50 +3470,63 @@ void cpu_dump_state (CPUCRISState *env, FILE *f, = fprintf_function cpu_fprintf, =20 } =20 -struct -{ - uint32_t vr; - const char *name; -} cris_cores[] =3D { - {8, "crisv8"}, - {9, "crisv9"}, - {10, "crisv10"}, - {11, "crisv11"}, - {32, "crisv32"}, -}; +typedef struct CRISCPUListState { + fprintf_function cpu_fprintf; + FILE *file; +} CRISCPUListState; =20 -void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf) +/* Sort by version. */ +static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b) { - unsigned int i; + CRISCPUClass *class_a =3D CRIS_CPU_CLASS(a); + CRISCPUClass *class_b =3D CRIS_CPU_CLASS(b); =20 - (*cpu_fprintf)(f, "Available CPUs:\n"); - for (i =3D 0; i < ARRAY_SIZE(cris_cores); i++) { - (*cpu_fprintf)(f, " %s\n", cris_cores[i].name); + if (class_a->vr =3D=3D class_b->vr) { + return 0; + } else if (class_a->vr > class_b->vr) { + return 1; + } else { + return -1; } } =20 -static uint32_t vr_by_name(const char *name) +static void cris_cpu_list_entry(gpointer data, gpointer user_data) { - unsigned int i; - for (i =3D 0; i < ARRAY_SIZE(cris_cores); i++) { - if (strcmp(name, cris_cores[i].name) =3D=3D 0) { - return cris_cores[i].vr; - } - } - return 32; + ObjectClass *klass =3D data; + CRISCPUListState *s =3D user_data; + + (*s->cpu_fprintf)(s->file, " %s\n", + object_class_get_name(klass)); } =20 -CPUCRISState *cpu_cris_init (const char *cpu_model) +void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf) { - CPUCRISState *env; + CRISCPUListState s =3D { + .file =3D f, + .cpu_fprintf =3D cpu_fprintf, + }; + GSList *list; + + list =3D object_class_get_list(TYPE_CRIS_CPU, false); + list =3D g_slist_sort(list, cris_cpu_list_compare); + (*cpu_fprintf)(f, "Available CPUs:\n"); + g_slist_foreach(list, cris_cpu_list_entry, &s); + g_slist_free(list); +} + +CPUCRISState *cpu_cris_init(const char *cpu_model) +{ + CRISCPU *cpu; + CPUCRISState *env; static int tcg_initialized =3D 0; int i; =20 - env =3D g_malloc0(sizeof(CPUCRISState)); + if (object_class_by_name(cpu_model) =3D=3D NULL) { + return NULL; + } + cpu =3D CRIS_CPU(object_new(cpu_model)); + env =3D &cpu->env; =20 - env->pregs[PR_VR] =3D vr_by_name(cpu_model); - cpu_exec_init(env); - cpu_state_reset(env); qemu_init_vcpu(env); =20 if (tcg_initialized) @@ -3575,25 +3588,7 @@ CPUCRISState *cpu_cris_init (const char *cpu_model= ) =20 void cpu_state_reset(CPUCRISState *env) { - uint32_t vr; - - if (qemu_loglevel_mask(CPU_LOG_RESET)) { - qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); - log_cpu_state(env, 0); - } - - vr =3D env->pregs[PR_VR]; - memset(env, 0, offsetof(CPUCRISState, breakpoints)); - env->pregs[PR_VR] =3D vr; - tlb_flush(env, 1); - -#if defined(CONFIG_USER_ONLY) - /* start in user mode with interrupts enabled. */ - env->pregs[PR_CCS] |=3D U_FLAG | I_FLAG | P_FLAG; -#else - cris_mmu_init(env); - env->pregs[PR_CCS] =3D 0; -#endif + cpu_reset(ENV_GET_CPU(env)); } =20 void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int p= c_pos) --=20 1.7.7