From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:60112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7vyr-0005UD-U7 for qemu-devel@nongnu.org; Wed, 14 Mar 2012 17:43:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7vyd-0005hF-9q for qemu-devel@nongnu.org; Wed, 14 Mar 2012 17:43:37 -0400 Received: from cantor2.suse.de ([195.135.220.15]:34938 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7vyc-0005gi-SZ for qemu-devel@nongnu.org; Wed, 14 Mar 2012 17:43:23 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 14 Mar 2012 22:42:43 +0100 Message-Id: <1331761376-20362-31-git-send-email-afaerber@suse.de> In-Reply-To: <1331761376-20362-1-git-send-email-afaerber@suse.de> References: <1331761376-20362-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v5 30/43] arm hw/: Don't use CPUState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Igor Mitsyanko , Evgeny Voevodin , Mark Langsdorf , Peter Crosthwaite , Jan Kiszka , Dmitry Solodkiy , Maksim Kozlov , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Scripted conversion: for file in hw/arm-misc.h hw/arm_boot.c hw/arm_pic.c hw/armv7m.c hw/exy= nos4210.h hw/highbank.c hw/integratorcp.c hw/musicpal.c hw/omap.h hw/pxa.= h hw/pxa2xx_gpio.c hw/pxa2xx_pic.c hw/realview.c hw/strongarm.h hw/versat= ilepb.c hw/vexpress.c hw/xilinx_zynq.c ; do sed -i "s/CPUState/CPUARMState/g" $file done Signed-off-by: Andreas F=C3=A4rber Acked-by: Anthony Liguori --- hw/arm-misc.h | 8 ++++---- hw/arm_boot.c | 8 ++++---- hw/arm_pic.c | 4 ++-- hw/armv7m.c | 4 ++-- hw/exynos4210.h | 2 +- hw/highbank.c | 8 ++++---- hw/integratorcp.c | 2 +- hw/musicpal.c | 2 +- hw/omap.h | 2 +- hw/pxa.h | 6 +++--- hw/pxa2xx_gpio.c | 4 ++-- hw/pxa2xx_pic.c | 4 ++-- hw/realview.c | 2 +- hw/strongarm.h | 2 +- hw/versatilepb.c | 2 +- hw/vexpress.c | 4 ++-- hw/xilinx_zynq.c | 2 +- 17 files changed, 33 insertions(+), 33 deletions(-) diff --git a/hw/arm-misc.h b/hw/arm-misc.h index 734bd82..2f46e21 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -16,7 +16,7 @@ /* The CPU is also modeled as an interrupt controller. */ #define ARM_PIC_CPU_IRQ 0 #define ARM_PIC_CPU_FIQ 1 -qemu_irq *arm_pic_init_cpu(CPUState *env); +qemu_irq *arm_pic_init_cpu(CPUARMState *env); =20 /* armv7m.c */ qemu_irq *armv7m_init(MemoryRegion *address_space_mem, @@ -50,16 +50,16 @@ struct arm_boot_info { * perform any necessary CPU reset handling and set the PC for thei * secondary CPUs to point at this boot blob. */ - void (*write_secondary_boot)(CPUState *env, + void (*write_secondary_boot)(CPUARMState *env, const struct arm_boot_info *info); - void (*secondary_cpu_reset_hook)(CPUState *env, + void (*secondary_cpu_reset_hook)(CPUARMState *env, const struct arm_boot_info *info); /* Used internally by arm_boot.c */ int is_linux; target_phys_addr_t initrd_size; target_phys_addr_t entry; }; -void arm_load_kernel(CPUState *env, struct arm_boot_info *info); +void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info); =20 /* Multiplication factor to convert from system clock ticks to qemu time= r ticks. */ diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 23b3f0a..7447f5c 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -59,7 +59,7 @@ static uint32_t smpboot[] =3D { 0 /* bootreg: Boot register address is held here */ }; =20 -static void default_write_secondary(CPUState *env, +static void default_write_secondary(CPUARMState *env, const struct arm_boot_info *info) { int n; @@ -72,7 +72,7 @@ static void default_write_secondary(CPUState *env, info->smp_loader_start); } =20 -static void default_reset_secondary(CPUState *env, +static void default_reset_secondary(CPUARMState *env, const struct arm_boot_info *info) { stl_phys_notdirty(info->smp_bootreg_addr, 0); @@ -274,7 +274,7 @@ static int load_dtb(target_phys_addr_t addr, const st= ruct arm_boot_info *binfo) =20 static void do_cpu_reset(void *opaque) { - CPUState *env =3D opaque; + CPUARMState *env =3D opaque; const struct arm_boot_info *info =3D env->boot_info; =20 cpu_state_reset(env); @@ -300,7 +300,7 @@ static void do_cpu_reset(void *opaque) } } =20 -void arm_load_kernel(CPUState *env, struct arm_boot_info *info) +void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info) { int kernel_size; int initrd_size; diff --git a/hw/arm_pic.c b/hw/arm_pic.c index a2e8a73..1094965 100644 --- a/hw/arm_pic.c +++ b/hw/arm_pic.c @@ -13,7 +13,7 @@ /* Input 0 is IRQ and input 1 is FIQ. */ static void arm_pic_cpu_handler(void *opaque, int irq, int level) { - CPUState *env =3D (CPUState *)opaque; + CPUARMState *env =3D (CPUARMState *)opaque; switch (irq) { case ARM_PIC_CPU_IRQ: if (level) @@ -32,7 +32,7 @@ static void arm_pic_cpu_handler(void *opaque, int irq, = int level) } } =20 -qemu_irq *arm_pic_init_cpu(CPUState *env) +qemu_irq *arm_pic_init_cpu(CPUARMState *env) { return qemu_allocate_irqs(arm_pic_cpu_handler, env, 2); } diff --git a/hw/armv7m.c b/hw/armv7m.c index 9cf96f4..4aac076 100644 --- a/hw/armv7m.c +++ b/hw/armv7m.c @@ -149,7 +149,7 @@ static void armv7m_bitband_init(void) =20 static void armv7m_reset(void *opaque) { - cpu_state_reset((CPUState *)opaque); + cpu_state_reset((CPUARMState *)opaque); } =20 /* Init CPU and memory for a v7-M based board. @@ -160,7 +160,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem= , int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model= ) { - CPUState *env; + CPUARMState *env; DeviceState *nvic; /* FIXME: make this local state. */ static qemu_irq pic[64]; diff --git a/hw/exynos4210.h b/hw/exynos4210.h index e7522f8..c112e03 100644 --- a/hw/exynos4210.h +++ b/hw/exynos4210.h @@ -83,7 +83,7 @@ typedef struct Exynos4210Irq { } Exynos4210Irq; =20 typedef struct Exynos4210State { - CPUState * env[EXYNOS4210_NCPUS]; + CPUARMState * env[EXYNOS4210_NCPUS]; Exynos4210Irq irqs; qemu_irq *irq_table; =20 diff --git a/hw/highbank.c b/hw/highbank.c index 489c00e..906eed5 100644 --- a/hw/highbank.c +++ b/hw/highbank.c @@ -37,12 +37,12 @@ /* Board init. */ static void highbank_cpu_reset(void *opaque) { - CPUState *env =3D opaque; + CPUARMState *env =3D opaque; =20 env->cp15.c15_config_base_address =3D GIC_BASE_ADDR; } =20 -static void hb_write_secondary(CPUState *env, const struct arm_boot_info= *info) +static void hb_write_secondary(CPUARMState *env, const struct arm_boot_i= nfo *info) { int n; uint32_t smpboot[] =3D { @@ -66,7 +66,7 @@ static void hb_write_secondary(CPUState *env, const str= uct arm_boot_info *info) rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), SMP_BOOT_ADD= R); } =20 -static void hb_reset_secondary(CPUState *env, const struct arm_boot_info= *info) +static void hb_reset_secondary(CPUARMState *env, const struct arm_boot_i= nfo *info) { switch (info->nb_cpus) { case 4: @@ -196,7 +196,7 @@ static void highbank_init(ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmd= line, const char *initrd_filename, const char *cpu_model) { - CPUState *env =3D NULL; + CPUARMState *env =3D NULL; DeviceState *dev; SysBusDevice *busdev; qemu_irq *irqp; diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 5b06c81..9bdb9e6 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -443,7 +443,7 @@ static void integratorcp_init(ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmd= line, const char *initrd_filename, const char *cpu_model) { - CPUState *env; + CPUARMState *env; MemoryRegion *address_space_mem =3D get_system_memory(); MemoryRegion *ram =3D g_new(MemoryRegion, 1); MemoryRegion *ram_alias =3D g_new(MemoryRegion, 1); diff --git a/hw/musicpal.c b/hw/musicpal.c index 187a1ae..c9f845a 100644 --- a/hw/musicpal.c +++ b/hw/musicpal.c @@ -1513,7 +1513,7 @@ static void musicpal_init(ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) { - CPUState *env; + CPUARMState *env; qemu_irq *cpu_pic; qemu_irq pic[32]; DeviceState *dev; diff --git a/hw/omap.h b/hw/omap.h index 60fa34c..63ef847 100644 --- a/hw/omap.h +++ b/hw/omap.h @@ -813,7 +813,7 @@ struct omap_mpu_state_s { omap3630, } mpu_model; =20 - CPUState *env; + CPUARMState *env; =20 qemu_irq *drq; =20 diff --git a/hw/pxa.h b/hw/pxa.h index e778739..025be34 100644 --- a/hw/pxa.h +++ b/hw/pxa.h @@ -65,11 +65,11 @@ # define PXA2XX_INTERNAL_SIZE 0x40000 =20 /* pxa2xx_pic.c */ -DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env); +DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUARMState *env); =20 /* pxa2xx_gpio.c */ DeviceState *pxa2xx_gpio_init(target_phys_addr_t base, - CPUState *env, DeviceState *pic, int lines); + CPUARMState *env, DeviceState *pic, int lines); void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler); =20 /* pxa2xx_dma.c */ @@ -122,7 +122,7 @@ typedef struct PXA2xxI2SState PXA2xxI2SState; typedef struct PXA2xxFIrState PXA2xxFIrState; =20 typedef struct { - CPUState *env; + CPUARMState *env; DeviceState *pic; qemu_irq reset; MemoryRegion sdram; diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c index d5f5716..09a408b 100644 --- a/hw/pxa2xx_gpio.c +++ b/hw/pxa2xx_gpio.c @@ -20,7 +20,7 @@ struct PXA2xxGPIOInfo { qemu_irq irq0, irq1, irqX; int lines; int ncpu; - CPUState *cpu_env; + CPUARMState *cpu_env; =20 /* XXX: GNU C vectors are more suitable */ uint32_t ilevel[PXA2XX_GPIO_BANKS]; @@ -249,7 +249,7 @@ static const MemoryRegionOps pxa_gpio_ops =3D { }; =20 DeviceState *pxa2xx_gpio_init(target_phys_addr_t base, - CPUState *env, DeviceState *pic, int lines) + CPUARMState *env, DeviceState *pic, int lines) { DeviceState *dev; =20 diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c index 6b2bdb0..a806b80 100644 --- a/hw/pxa2xx_pic.c +++ b/hw/pxa2xx_pic.c @@ -34,7 +34,7 @@ typedef struct { SysBusDevice busdev; MemoryRegion iomem; - CPUState *cpu_env; + CPUARMState *cpu_env; uint32_t int_enabled[2]; uint32_t int_pending[2]; uint32_t is_fiq[2]; @@ -245,7 +245,7 @@ static int pxa2xx_pic_post_load(void *opaque, int ver= sion_id) return 0; } =20 -DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env) +DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUARMState *env) { DeviceState *dev =3D qdev_create(NULL, "pxa2xx_pic"); PXA2xxPICState *s =3D FROM_SYSBUS(PXA2xxPICState, sysbus_from_qdev(d= ev)); diff --git a/hw/realview.c b/hw/realview.c index 50ea67c..cf55204 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -128,7 +128,7 @@ static void realview_init(ram_addr_t ram_size, const char *initrd_filename, const char *cpu_model, enum realview_board_type board_type) { - CPUState *env =3D NULL; + CPUARMState *env =3D NULL; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *ram_lo =3D g_new(MemoryRegion, 1); MemoryRegion *ram_hi =3D g_new(MemoryRegion, 1); diff --git a/hw/strongarm.h b/hw/strongarm.h index 684f61b..02acac3 100644 --- a/hw/strongarm.h +++ b/hw/strongarm.h @@ -53,7 +53,7 @@ enum { }; =20 typedef struct { - CPUState *env; + CPUARMState *env; MemoryRegion sdram; DeviceState *pic; DeviceState *gpio; diff --git a/hw/versatilepb.c b/hw/versatilepb.c index c1687a5..25afb1e 100644 --- a/hw/versatilepb.c +++ b/hw/versatilepb.c @@ -167,7 +167,7 @@ static void versatile_init(ram_addr_t ram_size, const char *initrd_filename, const char *cpu_model, int board_id) { - CPUState *env; + CPUARMState *env; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *ram =3D g_new(MemoryRegion, 1); qemu_irq *cpu_pic; diff --git a/hw/vexpress.c b/hw/vexpress.c index b9aafec..18d87ac 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -159,7 +159,7 @@ static void a9_daughterboard_init(const VEDBoardInfo = *daughterboard, const char *cpu_model, qemu_irq *pic, uint32_t *proc_id) { - CPUState *env =3D NULL; + CPUARMState *env =3D NULL; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *ram =3D g_new(MemoryRegion, 1); MemoryRegion *lowram =3D g_new(MemoryRegion, 1); @@ -259,7 +259,7 @@ static void a15_daughterboard_init(const VEDBoardInfo= *daughterboard, qemu_irq *pic, uint32_t *proc_id) { int n; - CPUState *env =3D NULL; + CPUARMState *env =3D NULL; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *ram =3D g_new(MemoryRegion, 1); MemoryRegion *sram =3D g_new(MemoryRegion, 1); diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c index ea13e8c..7290c64 100644 --- a/hw/xilinx_zynq.c +++ b/hw/xilinx_zynq.c @@ -50,7 +50,7 @@ static void zynq_init(ram_addr_t ram_size, const char *= boot_device, const char *kernel_filename, const char *kernel_= cmdline, const char *initrd_filename, const char *cpu_mod= el) { - CPUState *env =3D NULL; + CPUARMState *env =3D NULL; MemoryRegion *address_space_mem =3D get_system_memory(); MemoryRegion *ext_ram =3D g_new(MemoryRegion, 1); MemoryRegion *ocm_ram =3D g_new(MemoryRegion, 1); --=20 1.7.7