From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:57448) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S8beE-0002ZB-Ck for qemu-devel@nongnu.org; Fri, 16 Mar 2012 14:13:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S8beB-0005Wa-Np for qemu-devel@nongnu.org; Fri, 16 Mar 2012 14:13:05 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:45389) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S8beB-0005VW-FZ for qemu-devel@nongnu.org; Fri, 16 Mar 2012 14:13:03 -0400 From: Peter Maydell Date: Fri, 16 Mar 2012 18:12:50 +0000 Message-Id: <1331921572-11662-3-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1331921572-11662-1-git-send-email-peter.maydell@linaro.org> References: <1331921572-11662-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 2/4] arm: make sure that number of irqs can be represented in GICD_TYPER. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-devel@nongnu.org, Paul Brook From: Rusty Russell We currently assume that the number of interrupts (ITLinesNumber in the architecture reference manual) is divisible by 32, since we present it to the guest when it reads GICD_TYPER (in gic_dist_readb()) as (N / 32) - 1. Signed-off-by: Rusty Russell Signed-off-by: Peter Maydell --- hw/arm_gic.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 59eabcc..d8a7a19 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -819,6 +819,15 @@ static void gic_init(gic_state *s, int num_irq) hw_error("requested %u interrupt lines exceeds GIC maximum %d\n", num_irq, GIC_MAXIRQ); } + /* ITLinesNumber is represented as (N / 32) - 1 (see + * gic_dist_readb) so this is an implementation imposed + * restriction, not an architectural one: + */ + if (s->num_irq < 32 || (s->num_irq % 32)) { + hw_error("%d interrupt lines unsupported: not divisible by 32\n", + num_irq); + } + qdev_init_gpio_in(&s->busdev.qdev, gic_set_irq, s->num_irq - GIC_INTERNAL); for (i = 0; i < NUM_CPU(s); i++) { sysbus_init_irq(&s->busdev, &s->parent_irq[i]); -- 1.7.1