From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:57372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SCDig-0002iD-Ev for qemu-devel@nongnu.org; Mon, 26 Mar 2012 13:28:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SCDib-0001LD-UD for qemu-devel@nongnu.org; Mon, 26 Mar 2012 13:28:38 -0400 Received: from cantor2.suse.de ([195.135.220.15]:57925 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SCDib-0001Km-KL for qemu-devel@nongnu.org; Mon, 26 Mar 2012 13:28:33 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 26 Mar 2012 19:28:28 +0200 Message-Id: <1332782909-28412-3-git-send-email-afaerber@suse.de> In-Reply-To: <1332782909-28412-1-git-send-email-afaerber@suse.de> References: <1332782909-28412-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v6 2/2] target-arm: Minimalistic CPU QOM'ification List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Introduce only one non-abstract type TYPE_ARM_CPU and do not touch cp15 registers to not interfere with Peter's ongoing remodelling. Embed CPUARMState as first (additional) field of ARMCPU. Let reset call cpu_state_reset() for now. Signed-off-by: Andreas F=C3=A4rber --- Makefile.target | 1 + target-arm/cpu-qom.h | 70 ++++++++++++++++++++++++++++++++++++++++++++= ++++++ target-arm/cpu.c | 59 ++++++++++++++++++++++++++++++++++++++++++ target-arm/cpu.h | 1 + target-arm/helper.c | 4 ++- 5 files changed, 134 insertions(+), 1 deletions(-) create mode 100644 target-arm/cpu-qom.h create mode 100644 target-arm/cpu.c diff --git a/Makefile.target b/Makefile.target index 44b2e83..6e8b997 100644 --- a/Makefile.target +++ b/Makefile.target @@ -92,6 +92,7 @@ endif libobj-$(TARGET_SPARC64) +=3D vis_helper.o libobj-$(CONFIG_NEED_MMU) +=3D mmu.o libobj-$(TARGET_ARM) +=3D neon_helper.o iwmmxt_helper.o +libobj-$(TARGET_ARM) +=3D cpu.o ifeq ($(TARGET_BASE_ARCH), sparc) libobj-y +=3D fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_he= lper.o libobj-y +=3D cpu_init.o diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h new file mode 100644 index 0000000..cf107c9 --- /dev/null +++ b/target-arm/cpu-qom.h @@ -0,0 +1,70 @@ +/* + * QEMU ARM CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see + * + */ +#ifndef QEMU_ARM_CPU_QOM_H +#define QEMU_ARM_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#define TYPE_ARM_CPU "arm-cpu" + +#define ARM_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU) +#define ARM_CPU(obj) \ + OBJECT_CHECK(ARMCPU, (obj), TYPE_ARM_CPU) +#define ARM_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU) + +/** + * ARMCPUClass: + * + * An ARM CPU model. + */ +typedef struct ARMCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + void (*parent_reset)(CPUState *cpu); +} ARMCPUClass; + +/** + * ARMCPU: + * @env: #CPUARMState + * + * An ARM CPU core. + */ +typedef struct ARMCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUARMState env; +} ARMCPU; + +static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) +{ + return ARM_CPU(container_of(env, ARMCPU, env)); +} + +#define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e)) + + +#endif diff --git a/target-arm/cpu.c b/target-arm/cpu.c new file mode 100644 index 0000000..dda6b09 --- /dev/null +++ b/target-arm/cpu.c @@ -0,0 +1,59 @@ +/* + * QEMU ARM CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see + * + */ + +#include "cpu-qom.h" +#include "qemu-common.h" + +static void arm_cpu_reset(CPUState *c) +{ + ARMCPU *cpu =3D ARM_CPU(c); + ARMCPUClass *class =3D ARM_CPU_GET_CLASS(cpu); + + class->parent_reset(c); + + /* TODO Drop this in favor of cpu_arm_reset() calling cpu_reset() + * once cpu_reset_model_id() is gone. */ + cpu_state_reset(&cpu->env); +} + +static void arm_cpu_class_init(ObjectClass *c, void *data) +{ + ARMCPUClass *class =3D ARM_CPU_CLASS(c); + CPUClass *cpu_class =3D CPU_CLASS(class); + + class->parent_reset =3D cpu_class->reset; + cpu_class->reset =3D arm_cpu_reset; +} + +static const TypeInfo arm_cpu_type_info =3D { + .name =3D TYPE_ARM_CPU, + .parent =3D TYPE_CPU, + .instance_size =3D sizeof(ARMCPU), + .abstract =3D false, /* TODO Reconsider once cp15 reworked. */ + .class_size =3D sizeof(ARMCPUClass), + .class_init =3D arm_cpu_class_init, +}; + +static void arm_cpu_register_types(void) +{ + type_register_static(&arm_cpu_type_info); +} + +type_init(arm_cpu_register_types) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 69ef142..a68df61 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -475,6 +475,7 @@ static inline void cpu_clone_regs(CPUARMState *env, t= arget_ulong newsp) #endif =20 #include "cpu-all.h" +#include "cpu-qom.h" =20 /* Bit usage in the TB flags field: */ #define ARM_TBFLAG_THUMB_SHIFT 0 diff --git a/target-arm/helper.c b/target-arm/helper.c index 1ce8105..709de52 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -400,6 +400,7 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t = *buf, int reg) =20 CPUARMState *cpu_arm_init(const char *cpu_model) { + ARMCPU *cpu; CPUARMState *env; uint32_t id; static int inited =3D 0; @@ -407,7 +408,8 @@ CPUARMState *cpu_arm_init(const char *cpu_model) id =3D cpu_arm_find_by_name(cpu_model); if (id =3D=3D 0) return NULL; - env =3D g_malloc0(sizeof(CPUARMState)); + cpu =3D ARM_CPU(object_new(TYPE_ARM_CPU)); + env =3D &cpu->env; cpu_exec_init(env); if (tcg_enabled() && !inited) { inited =3D 1; --=20 1.7.7