[Qemu-devel] [PATCH V3 08/12] Add helper functions for MIPS DSP Bit/Manipulation instructions

[Jia Liu <proljc@gmail.com>]

Add helper functions for MIPS DSP Bit/Manipulation instructions.

Signed-off-by: Jia Liu <proljc@gmail.com>
---
 target-mips/dsp_helper.c |   85 ++++++++++++++++++++++++++++++++++++++++++++++
 target-mips/helper.h     |    8 ++++
 2 files changed, 93 insertions(+), 0 deletions(-)

diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index 4692cc4..cd9764f 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -2912,6 +2912,91 @@ void helper_mulsa_w_ph(int ac, uint32_t rs, uint32_t rt)
     env->active_tc.LO[ac] =  acc & MIPSDSP_LLO;
 }
 
+/** DSP Bit/Manipulation Sub-class insns **/
+uint32_t helper_bitrev(uint32_t rt)
+{
+    int32_t temp;
+    uint32_t rd;
+
+    temp = rt & MIPSDSP_LO;
+    rd = temp;
+
+    return rd;
+}
+
+void helper_insv(int reg_rt, uint32_t rs, uint32_t rt)
+{
+    uint32_t pos, size, msb, lsb, rs_f, rt_f;
+    uint32_t temp, temprs, temprt;
+    target_ulong dspc;
+
+    dspc = env->active_tc.DSPControl;
+    pos  = dspc & 0x1F;
+    size = (dspc >> 7) & 0x1F;
+    msb  = pos + size - 1;
+    lsb  = pos;
+
+    if (lsb > msb)
+        return;
+
+    rs_f = (((int32_t)0x01 << (msb - lsb + 1 + 1)) - 1) << lsb;
+    rt_f = rs_f ^ 0xFFFFFFFF;
+    temprs = rs & rs_f;
+    temprt = rt & rt_f;
+    temp = temprs | temprt;
+    env->active_tc.gpr[reg_rt] = temp;
+}
+
+uint32_t helper_repl_qb(uint32_t imm)
+{
+    uint8_t  temp;
+    uint32_t rd;
+
+    temp = imm & 0x00FF;
+    rd = ((uint32_t)temp << 24) | ((uint32_t)temp << 16) | \
+         ((uint32_t)temp << 8) | (uint32_t)temp;
+
+    return rd;
+}
+
+uint32_t helper_replv_qb(uint32_t rt)
+{
+    uint8_t temp;
+    uint32_t rd;
+
+    temp = rt & MIPSDSP_Q0;
+    rd = ((uint32_t)temp << 24) | ((uint32_t)temp << 16) | \
+         ((uint32_t)temp << 8) | (uint32_t)temp;
+
+    return rd;
+}
+
+uint32_t helper_repl_ph(uint32_t imm)
+{
+    int16_t temp;
+    int16_t imm_temp;
+    uint32_t rd;
+
+    imm_temp = imm & 0x03FF;
+    temp = (imm_temp << 22) >> 22;
+    rd = (((uint32_t)temp << 16) & MIPSDSP_HI) | \
+         ((uint32_t)temp & MIPSDSP_LO);
+
+    return rd;
+}
+
+uint32_t helper_replv_ph(uint32_t rt)
+{
+    uint16_t temp;
+    uint32_t rd;
+
+    temp = rt & MIPSDSP_LO;
+    rd = ((uint32_t)temp << 16) | (uint32_t)temp;
+
+    return rd;
+}
+
+
 #undef MIPSDSP_LHI
 #undef MIPSDSP_LLO
 #undef MIPSDSP_HI
diff --git a/target-mips/helper.h b/target-mips/helper.h
index f3fffa1..c45c173 100644
--- a/target-mips/helper.h
+++ b/target-mips/helper.h
@@ -413,4 +413,12 @@ DEF_HELPER_FLAGS_2(mulq_s_w, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32, i32)
 DEF_HELPER_FLAGS_2(mulq_rs_w, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32, i32)
 DEF_HELPER_3(mulsa_w_ph, void, int, i32, i32)
 
+/* DSP Bit/Manipulation Sub-class insns */
+DEF_HELPER_FLAGS_1(bitrev, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
+DEF_HELPER_3(insv, void, int, i32, i32)
+DEF_HELPER_FLAGS_1(repl_qb, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
+DEF_HELPER_FLAGS_1(replv_qb, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
+DEF_HELPER_FLAGS_1(repl_ph, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
+DEF_HELPER_FLAGS_1(replv_ph, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
+
 #include "def-helper.h"
-- 
1.7.5.4