From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58014) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDZ2M-00038O-3D for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:26:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SDZ2K-0003p4-E2 for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:26:29 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:60012) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDZ2K-0003ms-67 for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:26:28 -0400 From: Peter Maydell Date: Fri, 30 Mar 2012 11:26:13 +0100 Message-Id: <1333103176-3313-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 0/3] target-arm queue List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl , Aurelien Jarno , Paul Brook Cc: qemu-devel@nongnu.org Hi; this is a pullreq for my target-arm queue; please pull. The following changes since commit f638f0d3ae214d995cdd94578195700cda24597b: qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defs (2012-03-29 11:10:08 +0400) are available in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream Andreas Färber (2): target-arm: Drop cpu_arm_close() target-arm: Minimalistic CPU QOM'ification Andrew Towers (1): ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers. Makefile.target | 1 + target-arm/cpu-qom.h | 71 ++++++++++++++++++++++++++++++++++++++++++++++++ target-arm/cpu.c | 60 ++++++++++++++++++++++++++++++++++++++++ target-arm/cpu.h | 3 +- target-arm/helper.c | 14 +++++---- target-arm/translate.c | 2 +- 6 files changed, 143 insertions(+), 8 deletions(-) create mode 100644 target-arm/cpu-qom.h create mode 100644 target-arm/cpu.c