[Qemu-devel] [PATCH 00/14] target-arm: Create QOM subclass per CPU implementation

[Peter Maydell <peter.maydell@linaro.org>]

This patch series builds on Andreas' basic QOMification of the ARM
CPU by creating a QOM subclass for each ARM CPU implementation
(926,1176,A8,etc). We can then move the setup of feature bits, register
reset values, constant ID register values, etc, from the big switch
statement in cpu_reset_model_id() into the per-cpu init function.
This allows us to:
 * drop that big switch completely
 * get rid of the ugly "copy values across the memset" code we had
   for a few CPUARMState fields
 * remove the nasty implicit dependency on reset function ordering
   we were using on the Highbank board
 * easily make some of these fields QOM properties in future (this
   needs support for a realize method first, though)

Peter Maydell (14):
  target-arm: Add QOM subclasses for each ARM cpu implementation
  target-arm: Move feature bit settings to CPU init fns
  target-arm: Move FPSID config to cpu init fns
  target-arm: Move MVFR* setup to per cpu init fns
  target-arm: Move CTR setup to per cpu init fns
  target-arm: Move SCTLR reset value setup to per cpu init fns
  target-arm: Drop JTAG_ID documentation
  target-arm: Move iWMMXT wCID reset to cpu_state_reset
  target-arm: Move feature register setup to per-CPU init fns
  target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset
  target-arm: Move cache ID register setup to cpu specific init fns
  target-arm: Drop cpu_reset_model_id()
  target-arm: Move reset handling to arm_cpu_reset
  target-arm: Move A9 config_base_address reset value to ARMCPU

 hw/highbank.c        |   12 +-
 target-arm/cpu-qom.h |   27 ++
 target-arm/cpu.c     |  646 +++++++++++++++++++++++++++++++++++++++++++++++++-
 target-arm/cpu.h     |    6 +-
 target-arm/helper.c  |  452 ++++-------------------------------
 5 files changed, 726 insertions(+), 417 deletions(-)