From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36323) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SEhYV-0002Kb-Sc for qemu-devel@nongnu.org; Mon, 02 Apr 2012 09:44:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SEhYL-0004Gw-V9 for qemu-devel@nongnu.org; Mon, 02 Apr 2012 09:44:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:8272) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SEhYL-0004GW-Ng for qemu-devel@nongnu.org; Mon, 02 Apr 2012 09:44:13 -0400 From: "Daniel P. Berrange" Date: Mon, 2 Apr 2012 14:43:53 +0100 Message-Id: <1333374233-1238-1-git-send-email-berrange@redhat.com> Subject: [Qemu-devel] [PATCH arm] Fix bit test in Exynos4210 UART emulation to use & instead of && List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell From: "Daniel P. Berrange" * hw/exynos4210_uart.c: s/&&/&/ Signed-off-by: Daniel P. Berrange --- hw/exynos4210_uart.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/exynos4210_uart.c b/hw/exynos4210_uart.c index 73a9c18..ccc4780 100644 --- a/hw/exynos4210_uart.c +++ b/hw/exynos4210_uart.c @@ -246,7 +246,7 @@ static uint32_t exynos4210_uart_Tx_FIFO_trigger_level(Exynos4210UartState *s) uint32_t level = 0; uint32_t reg; - reg = (s->reg[I_(UFCON)] && UFCON_Tx_FIFO_TRIGGER_LEVEL) >> + reg = (s->reg[I_(UFCON)] & UFCON_Tx_FIFO_TRIGGER_LEVEL) >> UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT; switch (s->channel) { @@ -275,9 +275,9 @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s) * The Tx interrupt is always requested if the number of data in the * transmit FIFO is smaller than the trigger level. */ - if (s->reg[I_(UFCON)] && UFCON_FIFO_ENABLE) { + if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) { - uint32_t count = (s->reg[I_(UFSTAT)] && UFSTAT_Tx_FIFO_COUNT) >> + uint32_t count = (s->reg[I_(UFSTAT)] & UFSTAT_Tx_FIFO_COUNT) >> UFSTAT_Tx_FIFO_COUNT_SHIFT; if (count <= exynos4210_uart_Tx_FIFO_trigger_level(s)) { -- 1.7.7.6