[Qemu-devel] [PATCH v2 0/2] softfloat: fix 'int32 is 32 bits' assumptions

[Qemu-devel] [PATCH v2 0/2] softfloat: fix 'int32 is 32 bits' assumptions

[Peter Maydell]

This is a resend of some patches I sent out back in January when we
were kicking the int32-vs-int32_t issue around.

These patches fix some assumptions that are made by various bits
of code that the softfloat 'int32' and 'uint32' types are exactly
32 bits rather than at least 32 bits. They're worth applying IMHO
even if we don't get round to changing types to use int_fast*_t,
because they're fixing bogus assumptions.


v1->v2 changes:
 dropped the target-arm/helper.c patch as it has been applied already


Peter Maydell (2):
  softfloat: float*_to_int32_round_to_zero: don't assume int32 is 32 bits
  softfloat: roundAndPackInt{32,64}: Don't assume int32 is 32 bits

 fpu/softfloat.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

[Qemu-devel] [PATCH v2 1/2] softfloat: float*_to_int32_round_to_zero: don't assume int32 is 32 bits

[Peter Maydell]

Code in the float64_to_int32_round_to_zero() function was assuming
that int32 would not be wider than 32 bits; this meant it might
not correctly detect the overflow case. We take the simple approach
of using int32_t. Also fix equivalent issues in the functions
for other float sizes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 fpu/softfloat.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 81a7d1a..074fbc3 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1378,7 +1378,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM )
     flag aSign;
     int16 aExp, shiftCount;
     uint32_t aSig;
-    int32 z;
+    int32_t z;
     a = float32_squash_input_denormal(a STATUS_VAR);
 
     aSig = extractFloat32Frac( a );
@@ -2762,7 +2762,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM )
     flag aSign;
     int16 aExp, shiftCount;
     uint64_t aSig, savedASig;
-    int32 z;
+    int32_t z;
     a = float64_squash_input_denormal(a STATUS_VAR);
 
     aSig = extractFloat64Frac( a );
@@ -4248,7 +4248,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM )
     flag aSign;
     int32 aExp, shiftCount;
     uint64_t aSig, savedASig;
-    int32 z;
+    int32_t z;
 
     aSig = extractFloatx80Frac( a );
     aExp = extractFloatx80Exp( a );
@@ -5277,7 +5277,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM )
     flag aSign;
     int32 aExp, shiftCount;
     uint64_t aSig0, aSig1, savedASig;
-    int32 z;
+    int32_t z;
 
     aSig1 = extractFloat128Frac1( a );
     aSig0 = extractFloat128Frac0( a );
-- 
1.7.1

[Qemu-devel] [PATCH v2 2/2] softfloat: roundAndPackInt{32, 64}: Don't assume int32 is 32 bits

[Peter Maydell]

Fix code in roundAndPackInt32 that assumed that int32 was only
32 bits, by simply using int32_t instead. Fix the parallel bug
in roundAndPackInt64 as well, although that one is only theoretical
since it's unlikely that int64 will ever be more than 64 bits.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 fpu/softfloat.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 074fbc3..d37090a 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -117,7 +117,7 @@ static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM)
     int8 roundingMode;
     flag roundNearestEven;
     int8 roundIncrement, roundBits;
-    int32 z;
+    int32_t z;
 
     roundingMode = STATUS(float_rounding_mode);
     roundNearestEven = ( roundingMode == float_round_nearest_even );
@@ -166,7 +166,7 @@ static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATU
 {
     int8 roundingMode;
     flag roundNearestEven, increment;
-    int64 z;
+    int64_t z;
 
     roundingMode = STATUS(float_rounding_mode);
     roundNearestEven = ( roundingMode == float_round_nearest_even );
-- 
1.7.1