From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36389) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SPJ6G-00027y-PI for qemu-devel@nongnu.org; Tue, 01 May 2012 15:51:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SPJ6E-0004VW-0u for qemu-devel@nongnu.org; Tue, 01 May 2012 15:51:04 -0400 From: Alexander Graf Date: Tue, 1 May 2012 21:50:57 +0200 Message-Id: <1335901857-29799-9-git-send-email-agraf@suse.de> In-Reply-To: <1335901857-29799-1-git-send-email-agraf@suse.de> References: <1335901857-29799-1-git-send-email-agraf@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 8/8] target-ppc: Some support for dumping TLB_EMB TLBs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel Developers Cc: blauwirbel@gmail.com, =?utf-8?q?Fran=C3=A7ois=20Revol?= , qemu-ppc@nongnu.org From: Fran=C3=A7ois Revol Add mmubooke_dump_mmu(). TODO: Add printing of individual flags. Signed-off-by: Fran=C3=A7ois Revol [agraf: fix coding style] Signed-off-by: Alexander Graf --- target-ppc/helper.c | 50 +++++++++++++++++++++++++++++++++++++++++++++= +++++ 1 files changed, 50 insertions(+), 0 deletions(-) diff --git a/target-ppc/helper.c b/target-ppc/helper.c index c610ce3..e97e496 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -1466,6 +1466,53 @@ static const char *book3e_tsize_to_str[32] =3D { "1T", "2T" }; =20 +static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf, + CPUPPCState *env) +{ + ppcemb_tlb_t *entry; + int i; + + if (kvm_enabled() && !env->kvm_sw_tlb) { + cpu_fprintf(f, "Cannot access KVM TLB\n"); + return; + } + + cpu_fprintf(f, "\nTLB:\n"); + cpu_fprintf(f, "Effective Physical Size PID Pro= t " + "Attr\n"); + + entry =3D &env->tlb.tlbe[0]; + for (i =3D 0; i < env->nb_tlb; i++, entry++) { + target_phys_addr_t ea, pa; + target_ulong mask; + uint64_t size =3D (uint64_t)entry->size; + char size_buf[20]; + + /* Check valid flag */ + if (!(entry->prot & PAGE_VALID)) { + continue; + } + + mask =3D ~(entry->size - 1); + ea =3D entry->EPN & mask; + pa =3D entry->RPN & mask; +#if (TARGET_PHYS_ADDR_BITS >=3D 36) + /* Extend the physical address to 36 bits */ + pa |=3D (target_phys_addr_t)(entry->RPN & 0xF) << 32; +#endif + size /=3D 1024; + if (size >=3D 1024) { + snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "M", size /= 1024); + } else { + snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size); + } + cpu_fprintf(f, "0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %= 08x\n", + (uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entr= y->PID, + entry->prot, entry->attr); + } + +} + static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprin= tf, CPUPPCState *env, int tlbn, int off= set, int tlbsize) @@ -1561,6 +1608,9 @@ static void mmubooks_dump_mmu(FILE *f, fprintf_func= tion cpu_fprintf, void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env) { switch (env->mmu_model) { + case POWERPC_MMU_BOOKE: + mmubooke_dump_mmu(f, cpu_fprintf, env); + break; case POWERPC_MMU_BOOKE206: mmubooke206_dump_mmu(f, cpu_fprintf, env); break; --=20 1.6.0.2