From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Paul Brook" <paul@codesourcery.com>,
"Andreas Färber" <afaerber@suse.de>,
patches@linaro.org
Subject: [Qemu-devel] [PATCH 0/9] disentangle NVIC from ARM GIC
Date: Wed, 2 May 2012 18:12:03 +0100 [thread overview]
Message-ID: <1335978732-32559-1-git-send-email-peter.maydell@linaro.org> (raw)
This patch series refactors the ARMv7M NVIC so it no longer
textually includes arm_gic.c Instead we have a single common
base class which has the state struct, and a subclass for
the GIC and another for the NVIC.
As well as being generally rather nicer, this lays the
groundwork for supporting a KVM in-kernel irqchip by
getting the NVIC out of our hair. (My current KVM support
code is another couple of patches on top of this which add
a third subclass of ARMGICCommon which is the KVM model.)
(Not intended for 1.1, but I expect I'll put it into my
arm-devs.next tree to go a pullreq after master reopens
for 1.2.)
Peter Maydell (9):
hw/arm_gic: Remove NVIC ifdefs from gic_state struct
hw/arm_gic: Remove the special casing of NCPU for the NVIC
hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset
hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers
hw/arm_gic: Add qdev property for GIC revision
hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor
hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting
hw/arm_gic: Move CPU interface memory region setup into arm_gic_init
hw/armv7m_nvic: Make the NVIC a freestanding class
Makefile.target | 2 +-
hw/a15mpcore.c | 1 +
hw/arm11mpcore.c | 2 +
hw/arm_gic.c | 366 ++++++++-----------------------------------------
hw/arm_gic_common.c | 184 +++++++++++++++++++++++++
hw/arm_gic_internal.h | 136 ++++++++++++++++++
hw/armv7m_nvic.c | 138 ++++++++++++++++---
7 files changed, 501 insertions(+), 328 deletions(-)
create mode 100644 hw/arm_gic_common.c
create mode 100644 hw/arm_gic_internal.h
next reply other threads:[~2012-05-02 17:12 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-02 17:12 Peter Maydell [this message]
2012-05-02 17:12 ` [Qemu-devel] [PATCH 1/9] hw/arm_gic: Remove NVIC ifdefs from gic_state struct Peter Maydell
2012-05-18 12:55 ` Andreas Färber
2012-05-02 17:12 ` [Qemu-devel] [PATCH 2/9] hw/arm_gic: Remove the special casing of NCPU for the NVIC Peter Maydell
2012-05-18 13:01 ` Andreas Färber
2012-05-18 13:21 ` Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 3/9] hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 4/9] hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 5/9] hw/arm_gic: Add qdev property for GIC revision Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 6/9] hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 7/9] hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 8/9] hw/arm_gic: Move CPU interface memory region setup into arm_gic_init Peter Maydell
2012-05-02 17:12 ` [Qemu-devel] [PATCH 9/9] hw/armv7m_nvic: Make the NVIC a freestanding class Peter Maydell
2012-05-18 12:49 ` [Qemu-devel] [PATCH 0/9] disentangle NVIC from ARM GIC Peter Maydell
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