From: Peter Maydell <peter.maydell@linaro.org>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: qemu-devel@nongnu.org, Anthony Liguori <anthony@codemonkey.ws>,
Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PULL for-1.1] target-arm queue
Date: Tue, 8 May 2012 16:08:18 +0100 [thread overview]
Message-ID: <1336489699-10969-1-git-send-email-peter.maydell@linaro.org> (raw)
This is a pullreq for a single target-arm patch which I think worth
putting into 1.1. The bug has been in qemu for some time but it is
a trivial and obvious one-line fix. Please pull.
thanks
-- PMM
The following changes since commit 847c25d01cbe8e4fe457a7426f82daaaf3287aae:
hw/ac97: Mask out the EAPD bit on Powerdown Ctrl/Stat writes (2012-05-07 16:31:40 +0400)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream
Matt Craighead (1):
target-arm: When setting FPSCR.QC, don't clear other FPSCR bits
target-arm/neon_helper.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
next reply other threads:[~2012-05-08 15:08 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-08 15:08 Peter Maydell [this message]
2012-05-08 15:08 ` [Qemu-devel] [PATCH] target-arm: When setting FPSCR.QC, don't clear other FPSCR bits Peter Maydell
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