From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45037) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SRulN-0001Wk-PA for qemu-devel@nongnu.org; Tue, 08 May 2012 20:28:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SRulM-0000ob-2e for qemu-devel@nongnu.org; Tue, 08 May 2012 20:28:17 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 9 May 2012 02:28:08 +0200 Message-Id: <1336523290-6899-3-git-send-email-afaerber@suse.de> In-Reply-To: <1336523290-6899-1-git-send-email-afaerber@suse.de> References: <1336523290-6899-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v2 for-1.1 2/4] tcg/ppc: Don't hardcode register numbers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, agraf@suse.de, =?UTF-8?q?Andreas=20F=C3=A4rber?= Also assure i64 alignment where necessary. Alignment code optimization suggested by malc. Signed-off-by: Andreas F=C3=A4rber --- tcg/ppc/tcg-target.c | 29 +++++++++++++++++------------ 1 files changed, 17 insertions(+), 12 deletions(-) diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 4b85c89..b4e0466 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -552,7 +552,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCG= Arg *args, int opc) { int addr_reg, data_reg, data_reg2, r0, r1, rbase, bswap; #ifdef CONFIG_SOFTMMU - int mem_index, s_bits, r2; + int mem_index, s_bits, r2, ir; void *label1_ptr, *label2_ptr; #if TARGET_LONG_BITS =3D=3D 64 int addr_reg2; @@ -614,14 +614,17 @@ static void tcg_out_qemu_ld (TCGContext *s, const T= CGArg *args, int opc) #endif =20 /* slow path */ + ir =3D 3; #if TARGET_LONG_BITS =3D=3D 32 - tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg); - tcg_out_movi (s, TCG_TYPE_I32, 4, mem_index); + tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg); #else - tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg2); - tcg_out_mov (s, TCG_TYPE_I32, 4, addr_reg); - tcg_out_movi (s, TCG_TYPE_I32, 5, mem_index); +#ifdef TCG_TARGET_CALL_ALIGN_ARGS + ir |=3D 1; +#endif + tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg2); + tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg); #endif + tcg_out_movi (s, TCG_TYPE_I32, ir, mem_index); =20 tcg_out_call (s, (tcg_target_long) qemu_ld_helpers[s_bits], 1); switch (opc) { @@ -810,13 +813,15 @@ static void tcg_out_qemu_st (TCGContext *s, const T= CGArg *args, int opc) #endif =20 /* slow path */ + ir =3D 3; #if TARGET_LONG_BITS =3D=3D 32 - tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg); - ir =3D 4; + tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg); #else - tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg2); - tcg_out_mov (s, TCG_TYPE_I32, 4, addr_reg); - ir =3D 5; +#ifdef TCG_TARGET_CALL_ALIGN_ARGS + ir |=3D 1; +#endif + tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg2); + tcg_out_mov (s, TCG_TYPE_I32, ir++, addr_reg); #endif =20 switch (opc) { @@ -841,7 +846,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCG= Arg *args, int opc) break; case 3: #ifdef TCG_TARGET_CALL_ALIGN_ARGS - ir =3D 5; + ir |=3D 1; #endif tcg_out_mov (s, TCG_TYPE_I32, ir++, data_reg2); tcg_out_mov (s, TCG_TYPE_I32, ir, data_reg); --=20 1.7.7