From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:50243) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSH2G-0000sh-O8 for qemu-devel@nongnu.org; Wed, 09 May 2012 20:15:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SSH29-0005Pr-IF for qemu-devel@nongnu.org; Wed, 09 May 2012 20:15:12 -0400 Received: from cantor2.suse.de ([195.135.220.15]:35546 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSH29-0005Mq-CK for qemu-devel@nongnu.org; Wed, 09 May 2012 20:15:05 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 4D5AB977E6 for ; Thu, 10 May 2012 02:15:04 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 10 May 2012 02:13:54 +0200 Message-Id: <1336608892-30501-17-git-send-email-afaerber@suse.de> In-Reply-To: <1336608892-30501-1-git-send-email-afaerber@suse.de> References: <1336608892-30501-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH next v2 16/74] ppce500_mpc8544ds: Pass PowerPCCPU to mpc8544ds_cpu_reset[_sec] List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Allows us to use cpu_reset() in place of cpu_state_reset(). Signed-off-by: Andreas F=C3=A4rber --- hw/ppce500_mpc8544ds.c | 14 ++++++++------ 1 files changed, 8 insertions(+), 6 deletions(-) diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c index 88a2767..3eb8a23 100644 --- a/hw/ppce500_mpc8544ds.c +++ b/hw/ppce500_mpc8544ds.c @@ -196,9 +196,10 @@ static void mmubooke_create_initial_mapping(CPUPPCSt= ate *env, =20 static void mpc8544ds_cpu_reset_sec(void *opaque) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; =20 - cpu_state_reset(env); + cpu_reset(CPU(cpu)); =20 /* Secondary CPU starts in halted state for now. Needs to change whe= n implementing non-kernel boot. */ @@ -208,10 +209,11 @@ static void mpc8544ds_cpu_reset_sec(void *opaque) =20 static void mpc8544ds_cpu_reset(void *opaque) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; struct boot_info *bi =3D env->load_info; =20 - cpu_state_reset(env); + cpu_reset(CPU(cpu)); =20 /* Set initial guest state. */ env->halted =3D 0; @@ -281,11 +283,11 @@ static void mpc8544ds_init(ram_addr_t ram_size, /* Primary CPU */ struct boot_info *boot_info; boot_info =3D g_malloc0(sizeof(struct boot_info)); - qemu_register_reset(mpc8544ds_cpu_reset, env); + qemu_register_reset(mpc8544ds_cpu_reset, cpu); env->load_info =3D boot_info; } else { /* Secondary CPUs */ - qemu_register_reset(mpc8544ds_cpu_reset_sec, env); + qemu_register_reset(mpc8544ds_cpu_reset_sec, cpu); } } =20 --=20 1.7.7