From: "Andreas Färber" <afaerber@suse.de>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, agraf@suse.de, "Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [PATCH for-1.1 2/2] tcg/ppc64: Fix CONFIG_TCG_PASS_AREG0
Date: Sat, 12 May 2012 03:16:58 +0200 [thread overview]
Message-ID: <1336785418-9439-3-git-send-email-afaerber@suse.de> (raw)
In-Reply-To: <1336785418-9439-1-git-send-email-afaerber@suse.de>
In qemu_ld/st load the registers for the helper calls directly rather
than rotating them around afterwards for AREG0.
Also clobber the additional register.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
tcg/ppc64/tcg-target.c | 32 ++++++++++++--------------------
1 files changed, 12 insertions(+), 20 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 0573a72..c800574 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -235,6 +235,9 @@ static int target_parse_constraint (TCGArgConstraint *ct, const char **pct_str)
tcg_regset_reset_reg (ct->u.regs, TCG_REG_R3);
#ifdef CONFIG_SOFTMMU
tcg_regset_reset_reg (ct->u.regs, TCG_REG_R4);
+#ifdef CONFIG_TCG_PASS_AREG0
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R5);
+#endif
#endif
break;
case 'S': /* qemu_st constraint */
@@ -244,6 +247,9 @@ static int target_parse_constraint (TCGArgConstraint *ct, const char **pct_str)
#ifdef CONFIG_SOFTMMU
tcg_regset_reset_reg (ct->u.regs, TCG_REG_R4);
tcg_regset_reset_reg (ct->u.regs, TCG_REG_R5);
+#ifdef CONFIG_TCG_PASS_AREG0
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R6);
+#endif
#endif
break;
case 'Z':
@@ -670,18 +676,12 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
/* slow path */
ir = 3;
+#ifdef CONFIG_TCG_PASS_AREG0
+ tcg_out_mov (s, TCG_TYPE_I64, ir++, TCG_AREG0);
+#endif
tcg_out_mov (s, TCG_TYPE_I64, ir++, addr_reg);
tcg_out_movi (s, TCG_TYPE_I64, ir++, mem_index);
-#ifdef CONFIG_TCG_PASS_AREG0
- /* XXX/FIXME: suboptimal */
- tcg_out_mov (s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2],
- tcg_target_call_iarg_regs[1]);
- tcg_out_mov (s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1],
- tcg_target_call_iarg_regs[0]);
- tcg_out_mov (s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0],
- TCG_AREG0);
-#endif
tcg_out_call (s, (tcg_target_long) qemu_ld_helpers[s_bits], 1);
switch (opc) {
@@ -827,21 +827,13 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
/* slow path */
ir = 3;
+#ifdef CONFIG_TCG_PASS_AREG0
+ tcg_out_mov (s, TCG_TYPE_I64, ir++, TCG_AREG0);
+#endif
tcg_out_mov (s, TCG_TYPE_I64, ir++, addr_reg);
tcg_out_rld (s, RLDICL, ir++, data_reg, 0, 64 - (1 << (3 + opc)));
tcg_out_movi (s, TCG_TYPE_I64, ir++, mem_index);
-#ifdef CONFIG_TCG_PASS_AREG0
- /* XXX/FIXME: suboptimal */
- tcg_out_mov (s, TCG_TYPE_I32, tcg_target_call_iarg_regs[3],
- tcg_target_call_iarg_regs[2]);
- tcg_out_mov (s, TCG_TYPE_I64, tcg_target_call_iarg_regs[2],
- tcg_target_call_iarg_regs[1]);
- tcg_out_mov (s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1],
- tcg_target_call_iarg_regs[0]);
- tcg_out_mov (s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0],
- TCG_AREG0);
-#endif
tcg_out_call (s, (tcg_target_long) qemu_st_helpers[opc], 1);
label2_ptr = s->code_ptr;
--
1.7.7
next prev parent reply other threads:[~2012-05-12 1:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-12 1:16 [Qemu-devel] [PATCH for-1.1 0/2] tcg/ppc64: AREG0 support Andreas Färber
2012-05-12 1:16 ` [Qemu-devel] [PATCH for-1.1 1/2] tcg/ppc64: Don't hardcode register numbers for qemu_ld/st Andreas Färber
2012-05-12 1:16 ` Andreas Färber [this message]
2012-05-13 0:49 ` [Qemu-devel] [PATCH for-1.1 0/2] tcg/ppc64: AREG0 support malc
2012-05-14 15:01 ` Andreas Färber
2012-05-14 20:54 ` malc
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