From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41520) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1STz8I-0005Af-UQ for qemu-devel@nongnu.org; Mon, 14 May 2012 13:32:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1STz8C-0000dB-Vp for qemu-devel@nongnu.org; Mon, 14 May 2012 13:32:30 -0400 Received: from cantor2.suse.de ([195.135.220.15]:49644 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1STz8C-0000c3-Mx for qemu-devel@nongnu.org; Mon, 14 May 2012 13:32:24 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 14 May 2012 19:32:07 +0200 Message-Id: <1337016729-12285-21-git-send-email-afaerber@suse.de> In-Reply-To: <1337016729-12285-1-git-send-email-afaerber@suse.de> References: <1337016729-12285-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-next 20/22] pxa2xx: Pass ARMCPU to pxa2xx_pic_init() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= Cleans up after storing ARMCPU in PXA2xxState. Prepares for storing ARMCPU in PXA2xxPICState. Signed-off-by: Andreas F=C3=A4rber --- hw/pxa.h | 2 +- hw/pxa2xx.c | 4 ++-- hw/pxa2xx_pic.c | 3 ++- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/pxa.h b/hw/pxa.h index 2be006d..6a21205 100644 --- a/hw/pxa.h +++ b/hw/pxa.h @@ -65,7 +65,7 @@ # define PXA2XX_INTERNAL_SIZE 0x40000 =20 /* pxa2xx_pic.c */ -DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUARMState *env); +DeviceState *pxa2xx_pic_init(target_phys_addr_t base, ARMCPU *cpu); =20 /* pxa2xx_gpio.c */ DeviceState *pxa2xx_gpio_init(target_phys_addr_t base, diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index 5f8f226..7958d14 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -2081,7 +2081,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_spac= e, memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE, &s->internal); =20 - s->pic =3D pxa2xx_pic_init(0x40d00000, &s->cpu->env); + s->pic =3D pxa2xx_pic_init(0x40d00000, s->cpu); =20 s->dma =3D pxa27x_dma_init(0x40000000, qdev_get_gpio_in(s->pic, PXA2XX_PIC_DMA)); @@ -2213,7 +2213,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_spac= e, unsigned int sdram_size) memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE, &s->internal); =20 - s->pic =3D pxa2xx_pic_init(0x40d00000, &s->cpu->env); + s->pic =3D pxa2xx_pic_init(0x40d00000, s->cpu); =20 s->dma =3D pxa255_dma_init(0x40000000, qdev_get_gpio_in(s->pic, PXA2XX_PIC_DMA)); diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c index a806b80..255cc3f 100644 --- a/hw/pxa2xx_pic.c +++ b/hw/pxa2xx_pic.c @@ -245,8 +245,9 @@ static int pxa2xx_pic_post_load(void *opaque, int ver= sion_id) return 0; } =20 -DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUARMState *env) +DeviceState *pxa2xx_pic_init(target_phys_addr_t base, ARMCPU *cpu) { + CPUARMState *env =3D &cpu->env; DeviceState *dev =3D qdev_create(NULL, "pxa2xx_pic"); PXA2xxPICState *s =3D FROM_SYSBUS(PXA2xxPICState, sysbus_from_qdev(d= ev)); =20 --=20 1.7.7