qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Rusty Russell" <rusty.russell@linaro.org>,
	"Paul Brook" <paul@codesourcery.com>,
	"Andreas Färber" <afaerber@suse.de>,
	patches@linaro.org
Subject: [Qemu-devel] [PATCH qom-next v2 07/33] target-arm: Add register_cp_regs_for_features()
Date: Mon, 14 May 2012 20:03:06 +0100	[thread overview]
Message-ID: <1337022212-22219-8-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1337022212-22219-1-git-send-email-peter.maydell@linaro.org>

Add new function register_cp_regs_for_features() as a place to
register coprocessor registers dependent on feature flags.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/cpu-qom.h |    1 +
 target-arm/cpu.c     |    2 ++
 target-arm/helper.c  |   11 +++++++++++
 3 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 848ac2f..4ccfc89 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -107,5 +107,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
 #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
 
 void arm_cpu_realize(ARMCPU *cpu);
+void register_cp_regs_for_features(ARMCPU *cpu);
 
 #endif
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 6456a3d..1aff266 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -216,6 +216,8 @@ void arm_cpu_realize(ARMCPU *cpu)
     if (arm_feature(env, ARM_FEATURE_VFP3)) {
         set_feature(env, ARM_FEATURE_VFP);
     }
+
+    register_cp_regs_for_features(cpu);
 }
 
 /* CPU models */
diff --git a/target-arm/helper.c b/target-arm/helper.c
index dbb3c04..c002050 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -61,6 +61,17 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg)
     return 0;
 }
 
+void register_cp_regs_for_features(ARMCPU *cpu)
+{
+    /* Register all the coprocessor registers based on feature bits */
+    CPUARMState *env = &cpu->env;
+    if (arm_feature(env, ARM_FEATURE_M)) {
+        /* M profile has no coprocessor registers */
+        return;
+    }
+
+}
+
 ARMCPU *cpu_arm_init(const char *cpu_model)
 {
     ARMCPU *cpu;
-- 
1.7.1

  parent reply	other threads:[~2012-05-14 19:27 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-14 19:02 [Qemu-devel] [PATCH qom-next v2 00/33] target-arm: refactor copro register implementation Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 01/33] target-arm: Fix 11MPCore cache type register value Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 02/33] target-arm: initial coprocessor register framework Peter Maydell
2012-05-18 14:46   ` Andreas Färber
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 03/33] hw/pxa2xx: Convert cp14 perf registers to new scheme Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 04/33] hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 05/33] hw/pxa2xx_pic: Convert coprocessor registers to new scheme Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 06/33] target-arm: Remove old cpu_arm_set_cp_io infrastructure Peter Maydell
2012-05-14 19:03 ` Peter Maydell [this message]
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 08/33] target-arm: Convert debug registers to cp_reginfo Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 09/33] target-arm: Convert TEECR, TEEHBR to new scheme Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 10/33] target-arm: Convert WFI/barriers special cases to cp_reginfo Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 11/33] target-arm: Convert TLS registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 12/33] target-arm: Convert performance monitor registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 13/33] target-arm: Convert generic timer cp15 regs Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 14/33] target-arm: Convert cp15 c3 register Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 15/33] target-arm: Convert MMU fault status cp15 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 16/33] target-arm: Convert cp15 crn=2 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 17/33] target-arm: Convert cp15 crn=13 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 18/33] target-arm: Convert cp15 crn=10 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 19/33] target-arm: Convert cp15 crn=15 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 20/33] target-arm: Convert cp15 MMU TLB control Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 21/33] target-arm: Convert cp15 VA-PA translation registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 22/33] target-arm: convert cp15 crn=7 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 23/33] target-arm: Convert cp15 crn=6 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 24/33] target-arm: Convert cp15 crn=9 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 25/33] target-arm: Convert cp15 crn=1 registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 26/33] target-arm: Convert cp15 crn=0 crm={1, 2} feature registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 27/33] target-arm: Convert cp15 cache ID registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 28/33] target-arm: Convert MPIDR Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 29/33] target-arm: Convert final ID registers Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 30/33] target-arm: Remove c0_cachetype CPUARMState field Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 31/33] target-arm: Move block cache ops to new cp15 framework Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 32/33] target-arm: Remove remaining old cp15 infrastructure Peter Maydell
2012-05-14 19:03 ` [Qemu-devel] [PATCH qom-next v2 33/33] target-arm: Remove ARM_CPUID_* macros Peter Maydell
2012-06-19 17:06   ` Andreas Färber

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1337022212-22219-8-git-send-email-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=afaerber@suse.de \
    --cc=patches@linaro.org \
    --cc=paul@codesourcery.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rusty.russell@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).