From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:47307) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SWsVq-0000vd-7s for qemu-devel@nongnu.org; Tue, 22 May 2012 13:04:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SWsVh-0007gl-Tg for qemu-devel@nongnu.org; Tue, 22 May 2012 13:04:45 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:38837) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SWsVh-0007gT-MM for qemu-devel@nongnu.org; Tue, 22 May 2012 13:04:37 -0400 From: Peter Maydell Date: Tue, 22 May 2012 18:04:35 +0100 Message-Id: <1337706275-3743-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paul Brook , patches@linaro.org Add a cast to a logging printf to avoid a compilation failure if target_phys_addr_t is a 64 bit type. (This is better than using TARGET_FMT_plx because we really don't need a full 16 digit hex string to print the offset into a device.) Signed-off-by: Peter Maydell --- hw/a9mpcore.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/a9mpcore.c b/hw/a9mpcore.c index c2ff74d..98f52f0 100644 --- a/hw/a9mpcore.c +++ b/hw/a9mpcore.c @@ -75,7 +75,7 @@ static void a9_scu_write(void *opaque, target_phys_addr_t offset, break; default: fprintf(stderr, "Invalid size %u in write to a9 scu register %x\n", - size, offset); + size, (uint32_t)offset); return; } -- 1.7.1