From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45064) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SX1wn-0000cx-Sx for qemu-devel@nongnu.org; Tue, 22 May 2012 23:09:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SX1wh-0005ea-6K for qemu-devel@nongnu.org; Tue, 22 May 2012 23:09:13 -0400 Received: from cantor2.suse.de ([195.135.220.15]:35581 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SX1wg-0005dg-VM for qemu-devel@nongnu.org; Tue, 22 May 2012 23:09:07 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id E4E1A97155 for ; Wed, 23 May 2012 05:09:05 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 23 May 2012 05:07:46 +0200 Message-Id: <1337742502-28565-24-git-send-email-afaerber@suse.de> In-Reply-To: <1337742502-28565-1-git-send-email-afaerber@suse.de> References: <1337742502-28565-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-next 23/59] ppc: Pass PowerPCCPU to ppc40x_set_irq() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Needed for qemu_cpu_kick() and moving halted field to CPUState. Signed-off-by: Andreas F=C3=A4rber --- hw/ppc.c | 11 +++++++---- 1 files changed, 7 insertions(+), 4 deletions(-) diff --git a/hw/ppc.c b/hw/ppc.c index de1a33b..fc3a65c 100644 --- a/hw/ppc.c +++ b/hw/ppc.c @@ -283,9 +283,10 @@ void ppcPOWER7_irq_init(CPUPPCState *env) #endif /* defined(TARGET_PPC64) */ =20 /* PowerPC 40x internal IRQ controller */ -static void ppc40x_set_irq (void *opaque, int pin, int level) +static void ppc40x_set_irq(void *opaque, int pin, int level) { - CPUPPCState *env =3D opaque; + PowerPCCPU *cpu =3D opaque; + CPUPPCState *env =3D &cpu->env; int cur_level; =20 LOG_IRQ("%s: env %p pin %d level %d\n", __func__, @@ -355,10 +356,12 @@ static void ppc40x_set_irq (void *opaque, int pin, = int level) } } =20 -void ppc40x_irq_init (CPUPPCState *env) +void ppc40x_irq_init(CPUPPCState *env) { + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + env->irq_inputs =3D (void **)qemu_allocate_irqs(&ppc40x_set_irq, - env, PPC40x_INPUT_NB); + cpu, PPC40x_INPUT_NB); } =20 /* PowerPC E500 internal IRQ controller */ --=20 1.7.7