From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:49448) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXEbY-00025z-Pv for qemu-devel@nongnu.org; Wed, 23 May 2012 12:40:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SXEbS-000890-Ca for qemu-devel@nongnu.org; Wed, 23 May 2012 12:40:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32597) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SXEbS-000857-3c for qemu-devel@nongnu.org; Wed, 23 May 2012 12:40:02 -0400 From: Igor Mammedov Date: Wed, 23 May 2012 18:39:38 +0200 Message-Id: <1337791181-27446-4-git-send-email-imammedo@redhat.com> In-Reply-To: <1337791181-27446-1-git-send-email-imammedo@redhat.com> References: <1337791181-27446-1-git-send-email-imammedo@redhat.com> Subject: [Qemu-devel] [PATCH qom-next 3/6] target-i386: add cpu-model property to x86_cpu List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, aliguori@us.ibm.com, wei.liu2@citrix.com, ehabkost@redhat.com, stefano.stabellini@eu.citrix.com, sw@weilnetz.de, mtosatti@redhat.com, agraf@suse.de, blauwirbel@gmail.com, avi@redhat.com, jan.kiszka@siemens.com, anthony.perard@citrix.com, pbonzini@redhat.com, afaerber@suse.de it's probably intermidiate step till cpu modeled as sub-classes. After then we probably could drop it. However it still could be used for overiding default cpu subclasses definition, and probably renamed to something like 'features'. v2: - remove accidential tcg_* init code move Signed-off-by: Igor Mammedov --- cpu-defs.h | 2 +- hw/pc.c | 10 ---------- target-i386/cpu.c | 24 ++++++++++++++++++++++++ target-i386/helper.c | 16 ++++++++++++---- 4 files changed, 37 insertions(+), 15 deletions(-) diff --git a/cpu-defs.h b/cpu-defs.h index f49e950..8f4623c 100644 --- a/cpu-defs.h +++ b/cpu-defs.h @@ -221,7 +221,7 @@ typedef struct CPUWatchpoint { struct QemuCond *halt_cond; \ int thread_kicked; \ struct qemu_work_item *queued_work_first, *queued_work_last; \ - const char *cpu_model_str; \ + char *cpu_model_str; \ struct KVMState *kvm_state; \ struct kvm_run *kvm_run; \ int kvm_fd; \ diff --git a/hw/pc.c b/hw/pc.c index c609770..1aa90a2 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -930,7 +930,6 @@ static X86CPU *pc_new_cpu(const char *cpu_model) cpu = cpu_x86_init(cpu_model); if (cpu == NULL) { - fprintf(stderr, "Unable to find x86 CPU definition\n"); exit(1); } env = &cpu->env; @@ -946,15 +945,6 @@ void pc_cpus_init(const char *cpu_model) { int i; - /* init CPUs */ - if (cpu_model == NULL) { -#ifdef TARGET_X86_64 - cpu_model = "qemu64"; -#else - cpu_model = "qemu32"; -#endif - } - for(i = 0; i < smp_cpus; i++) { pc_new_cpu(cpu_model); } diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 14c0f64..e655129 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1731,6 +1731,27 @@ static void mce_init(X86CPU *cpu) } } +static char *x86_get_cpu_model(Object *obj, Error **errp) +{ + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + return g_strdup(env->cpu_model_str); +} + +static void x86_set_cpu_model(Object *obj, const char *value, Error **errp) +{ + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + + g_free((gpointer)env->cpu_model_str); + env->cpu_model_str = g_strdup(value); + + if (cpu_x86_register(cpu, env->cpu_model_str) < 0) { + fprintf(stderr, "Unable to find x86 CPU definition\n"); + error_set(errp, QERR_INVALID_PARAMETER_COMBINATION); + } +} + void x86_cpu_realize(Object *obj, Error **errp) { X86CPU *cpu = X86_CPU(obj); @@ -1771,6 +1792,9 @@ static void x86_cpu_initfn(Object *obj) x86_cpuid_get_tsc_freq, x86_cpuid_set_tsc_freq, NULL, NULL, NULL); + object_property_add_str(obj, "cpu-model", + x86_get_cpu_model, x86_set_cpu_model, NULL); + env->cpuid_apic_id = env->cpu_index; } diff --git a/target-i386/helper.c b/target-i386/helper.c index 3ceefad..fbaeeea 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1154,12 +1154,10 @@ int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, X86CPU *cpu_x86_init(const char *cpu_model) { X86CPU *cpu; - CPUX86State *env; + Error *errp = NULL; static int inited; cpu = X86_CPU(object_new(TYPE_X86_CPU)); - env = &cpu->env; - env->cpu_model_str = cpu_model; /* init various static tables used in TCG mode */ if (tcg_enabled() && !inited) { @@ -1170,7 +1168,17 @@ X86CPU *cpu_x86_init(const char *cpu_model) cpu_set_debug_excp_handler(breakpoint_handler); #endif } - if (cpu_x86_register(cpu, cpu_model) < 0) { + + if (cpu_model) { + object_property_set_str(OBJECT(cpu), cpu_model, "cpu-model", &errp); + } else { +#ifdef TARGET_X86_64 + object_property_set_str(OBJECT(cpu), "qemu64", "cpu-model", &errp); +#else + object_property_set_str(OBJECT(cpu), "qemu32", "cpu-model", &errp); +#endif + } + if (errp) { object_delete(OBJECT(cpu)); return NULL; } -- 1.7.7.6