From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36001) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SbiUm-0001rY-61 for qemu-devel@nongnu.org; Mon, 04 Jun 2012 21:23:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SbiUk-000864-B7 for qemu-devel@nongnu.org; Mon, 04 Jun 2012 21:23:39 -0400 Received: from cantor2.suse.de ([195.135.220.15]:52663 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SbiUk-00085b-1Z for qemu-devel@nongnu.org; Mon, 04 Jun 2012 21:23:38 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Tue, 5 Jun 2012 03:21:39 +0200 Message-Id: <1338859366-20689-8-git-send-email-afaerber@suse.de> In-Reply-To: <1338859366-20689-1-git-send-email-afaerber@suse.de> References: <1338859366-20689-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 07/74] target-lm32: Let cpu_lm32_init() return LM32CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Michael Walle , =?UTF-8?q?Andreas=20F=C3=A4rber?= Make the include paths for cpu-qom.h consistent to allow using LM32CPU in cpu.h. Turn cpu_init macro into a static inline function returning CPULM32State for backwards compatibility. Signed-off-by: Andreas F=C3=A4rber Acked-by: Michael Walle --- target-lm32/cpu.c | 2 +- target-lm32/cpu.h | 12 ++++++++++-- target-lm32/helper.c | 4 ++-- 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index 48a5fe3..caa4834 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -18,7 +18,7 @@ * */ =20 -#include "cpu-qom.h" +#include "cpu.h" #include "qemu-common.h" =20 =20 diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 422a55b..da80469 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -186,7 +186,7 @@ struct CPULM32State { =20 #include "cpu-qom.h" =20 -CPULM32State *cpu_lm32_init(const char *cpu_model); +LM32CPU *cpu_lm32_init(const char *cpu_model); void cpu_lm32_list(FILE *f, fprintf_function cpu_fprintf); int cpu_lm32_exec(CPULM32State *s); void cpu_lm32_close(CPULM32State *s); @@ -199,8 +199,16 @@ int cpu_lm32_signal_handler(int host_signum, void *p= info, void lm32_translate_init(void); void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value); =20 +static inline CPULM32State *cpu_init(const char *cpu_model) +{ + LM32CPU *cpu =3D cpu_lm32_init(cpu_model); + if (cpu =3D=3D NULL) { + return NULL; + } + return &cpu->env; +} + #define cpu_list cpu_lm32_list -#define cpu_init cpu_lm32_init #define cpu_exec cpu_lm32_exec #define cpu_gen_code cpu_lm32_gen_code #define cpu_signal_handler cpu_lm32_signal_handler diff --git a/target-lm32/helper.c b/target-lm32/helper.c index d0bc193..3b1cee7 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -192,7 +192,7 @@ static uint32_t cfg_by_def(const LM32Def *def) return cfg; } =20 -CPULM32State *cpu_lm32_init(const char *cpu_model) +LM32CPU *cpu_lm32_init(const char *cpu_model) { LM32CPU *cpu; CPULM32State *env; @@ -219,7 +219,7 @@ CPULM32State *cpu_lm32_init(const char *cpu_model) lm32_translate_init(); } =20 - return env; + return cpu; } =20 /* Some soc ignores the MSB on the address bus. Thus creating a shadow m= emory --=20 1.7.7