From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:54122) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SbxVC-0001PA-Mf for qemu-devel@nongnu.org; Tue, 05 Jun 2012 13:25:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SbxV5-0000qj-RU for qemu-devel@nongnu.org; Tue, 05 Jun 2012 13:25:06 -0400 Received: from mx1.redhat.com ([209.132.183.28]:3844) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SbxV5-0000qV-JO for qemu-devel@nongnu.org; Tue, 05 Jun 2012 13:24:59 -0400 From: Luiz Capitulino Date: Tue, 5 Jun 2012 14:24:41 -0300 Message-Id: <1338917108-3965-3-git-send-email-lcapitulino@redhat.com> In-Reply-To: <1338917108-3965-1-git-send-email-lcapitulino@redhat.com> References: <1338917108-3965-1-git-send-email-lcapitulino@redhat.com> Subject: [Qemu-devel] [PATCH 02/29] Add API to check whether a physical address is I/O address List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@us.ibm.com From: Wen Congyang This API will be used in the following patch. Signed-off-by: Wen Congyang Signed-off-by: Luiz Capitulino --- cpu-common.h | 4 ++++ exec.c | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/cpu-common.h b/cpu-common.h index dca5175..1fe3280 100644 --- a/cpu-common.h +++ b/cpu-common.h @@ -71,6 +71,10 @@ void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len, void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); void cpu_unregister_map_client(void *cookie); +#ifndef CONFIG_USER_ONLY +bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr); +#endif + /* Coalesced MMIO regions are areas where write operations can be reordered. * This usually implies that write operations are side-effect free. This allows * batching which can make a major impact on performance when using diff --git a/exec.c b/exec.c index a0494c7..1b65859 100644 --- a/exec.c +++ b/exec.c @@ -4336,3 +4336,15 @@ bool virtio_is_big_endian(void) } #endif + +#ifndef CONFIG_USER_ONLY +bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr) +{ + MemoryRegionSection *section; + + section = phys_page_find(phys_addr >> TARGET_PAGE_BITS); + + return !(memory_region_is_ram(section->mr) || + memory_region_is_romd(section->mr)); +} +#endif -- 1.7.10.2.565.gbd578b5