From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45211) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScFL8-0004Ca-E0 for qemu-devel@nongnu.org; Wed, 06 Jun 2012 08:27:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ScFL6-0006TT-5Z for qemu-devel@nongnu.org; Wed, 06 Jun 2012 08:27:53 -0400 Received: from mail-pz0-f45.google.com ([209.85.210.45]:39822) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScFL5-0006M4-Sx for qemu-devel@nongnu.org; Wed, 06 Jun 2012 08:27:52 -0400 Received: by mail-pz0-f45.google.com with SMTP id v2so9467037dad.4 for ; Wed, 06 Jun 2012 05:27:50 -0700 (PDT) From: Jia Liu Date: Wed, 6 Jun 2012 20:27:01 +0800 Message-Id: <1338985632-29597-6-git-send-email-proljc@gmail.com> In-Reply-To: <1338985632-29597-1-git-send-email-proljc@gmail.com> References: <1338985632-29597-1-git-send-email-proljc@gmail.com> Content-Type: text/plain; charset="utf-8" Subject: [Qemu-devel] [PATCH v3 05/16] target-or32: Add exception support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Add OpenRISC exception support. Signed-off-by: Jia Liu --- Makefile.target | 3 ++- target-openrisc/excp.c | 27 +++++++++++++++++++++++++++ target-openrisc/excp.h | 28 ++++++++++++++++++++++++++++ target-openrisc/excp_helper.c | 27 +++++++++++++++++++++++++++ target-openrisc/helper.h | 3 +++ 5 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 target-openrisc/excp.c create mode 100644 target-openrisc/excp.h create mode 100644 target-openrisc/excp_helper.c diff --git a/Makefile.target b/Makefile.target index cacbdaf..0ce85cb 100644 --- a/Makefile.target +++ b/Makefile.target @@ -103,7 +103,8 @@ endif libobj-$(TARGET_SPARC) += int32_helper.o libobj-$(TARGET_SPARC64) += int64_helper.o libobj-$(TARGET_ALPHA) += int_helper.o fpu_helper.o sys_helper.o mem_helper.o -libobj-$(TARGET_OPENRISC) += intrpt.o intrpt_helper.o mmu.o mmu_helper.o +libobj-$(TARGET_OPENRISC) += excp.o excp_helper.o intrpt.o intrpt_helper.o \ + mmu.o mmu_helper.o libobj-y += disas.o libobj-$(CONFIG_TCI_DIS) += tci-dis.o diff --git a/target-openrisc/excp.c b/target-openrisc/excp.c new file mode 100644 index 0000000..6d8c5dd --- /dev/null +++ b/target-openrisc/excp.c @@ -0,0 +1,27 @@ +/* + * OpenRISC exception. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "excp.h" + +void QEMU_NORETURN raise_exception(CPUOpenRISCState *env, uint32_t excp) +{ + env->exception_index = excp; + cpu_loop_exit(env); +} diff --git a/target-openrisc/excp.h b/target-openrisc/excp.h new file mode 100644 index 0000000..885203b --- /dev/null +++ b/target-openrisc/excp.h @@ -0,0 +1,28 @@ +/* + * OpenRISC exception header. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef QEMU_OPENRISC_EXCP_H +#define QEMU_OPENRISC_EXCP_H + +#include "cpu.h" +#include "qemu-common.h" + +void QEMU_NORETURN raise_exception(CPUOpenRISCState *env, uint32_t excp); + +#endif /* QEMU_OPENRISC_EXCP_H */ diff --git a/target-openrisc/excp_helper.c b/target-openrisc/excp_helper.c new file mode 100644 index 0000000..c7d4110 --- /dev/null +++ b/target-openrisc/excp_helper.c @@ -0,0 +1,27 @@ +/* + * OpenRISC exception helper routines + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "helper.h" +#include "excp.h" + +void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) +{ + raise_exception(env, excp); +} diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h index 16d99b6..4e2a49f 100644 --- a/target-openrisc/helper.h +++ b/target-openrisc/helper.h @@ -19,6 +19,9 @@ #include "def-helper.h" +/* exception */ +DEF_HELPER_FLAGS_2(exception, 0, void, env, i32) + /* interrupt */ DEF_HELPER_FLAGS_1(rfe, 0, void, env) -- 1.7.9.5