From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:39098) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScZ45-0000QU-O0 for qemu-devel@nongnu.org; Thu, 07 Jun 2012 05:31:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ScZ40-0004GW-SF for qemu-devel@nongnu.org; Thu, 07 Jun 2012 05:31:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:1026) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScZ40-0004F3-Jn for qemu-devel@nongnu.org; Thu, 07 Jun 2012 05:31:32 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q579VVc0021050 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 7 Jun 2012 05:31:31 -0400 From: Gerd Hoffmann Date: Thu, 7 Jun 2012 11:31:19 +0200 Message-Id: <1339061486-28513-31-git-send-email-kraxel@redhat.com> In-Reply-To: <1339061486-28513-1-git-send-email-kraxel@redhat.com> References: <1339061486-28513-1-git-send-email-kraxel@redhat.com> Subject: [Qemu-devel] [PATCH 30/37] ehci: fix reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Gerd Hoffmann Check for the reset bit first when processing USBCMD register writes. Also break out of the switch, there is no need to check the other bits. Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-ehci.c | 10 ++++++---- 1 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index f8ed80d..3b602b0 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -1107,6 +1107,12 @@ static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) /* Do any register specific pre-write processing here. */ switch(addr) { case USBCMD: + if (val & USBCMD_HCRESET) { + ehci_reset(s); + val = s->usbcmd; + break; + } + if ((val & USBCMD_RUNSTOP) && !(s->usbcmd & USBCMD_RUNSTOP)) { qemu_mod_timer(s->frame_timer, qemu_get_clock_ns(vm_clock)); SET_LAST_RUN_CLOCK(s); @@ -1121,10 +1127,6 @@ static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) ehci_set_usbsts(s, USBSTS_HALT); } - if (val & USBCMD_HCRESET) { - ehci_reset(s); - val = s->usbcmd; - } /* not supporting dynamic frame list size at the moment */ if ((val & USBCMD_FLS) && !(s->usbcmd & USBCMD_FLS)) { -- 1.7.1