From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34392) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sds4T-0002A2-SB for qemu-devel@nongnu.org; Sun, 10 Jun 2012 20:01:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Sds4R-0006My-B9 for qemu-devel@nongnu.org; Sun, 10 Jun 2012 20:01:25 -0400 Received: from cantor2.suse.de ([195.135.220.15]:43957 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sds4R-0006Mh-1L for qemu-devel@nongnu.org; Sun, 10 Jun 2012 20:01:23 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 11 Jun 2012 02:00:45 +0200 Message-Id: <1339372859-30148-14-git-send-email-afaerber@suse.de> In-Reply-To: <1339372859-30148-1-git-send-email-afaerber@suse.de> References: <1339372859-30148-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 13/27] arm_boot: Pass ARMCPU to arm_boot_info::secondary_cpu_reset_hook() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Mark Langsdorf Adapt highbank accordingly. Signed-off-by: Andreas F=C3=A4rber Acked-by: Peter Maydell --- hw/arm-misc.h | 2 +- hw/arm_boot.c | 6 ++++-- hw/highbank.c | 4 +++- 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/arm-misc.h b/hw/arm-misc.h index 320033d..bbd6fd3 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -52,7 +52,7 @@ struct arm_boot_info { */ void (*write_secondary_boot)(ARMCPU *cpu, const struct arm_boot_info *info); - void (*secondary_cpu_reset_hook)(CPUARMState *env, + void (*secondary_cpu_reset_hook)(ARMCPU *cpu, const struct arm_boot_info *info); /* Used internally by arm_boot.c */ int is_linux; diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 4955f01..8eabfb2 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -72,9 +72,11 @@ static void default_write_secondary(ARMCPU *cpu, info->smp_loader_start); } =20 -static void default_reset_secondary(CPUARMState *env, +static void default_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) { + CPUARMState *env =3D &cpu->env; + stl_phys_notdirty(info->smp_bootreg_addr, 0); env->regs[15] =3D info->smp_loader_start; } @@ -295,7 +297,7 @@ static void do_cpu_reset(void *opaque) } } } else { - info->secondary_cpu_reset_hook(env, info); + info->secondary_cpu_reset_hook(cpu, info); } } } diff --git a/hw/highbank.c b/hw/highbank.c index 45ca1ad..66ff042 100644 --- a/hw/highbank.c +++ b/hw/highbank.c @@ -60,8 +60,10 @@ static void hb_write_secondary(ARMCPU *cpu, const stru= ct arm_boot_info *info) rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), SMP_BOOT_ADD= R); } =20 -static void hb_reset_secondary(CPUARMState *env, const struct arm_boot_i= nfo *info) +static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *= info) { + CPUARMState *env =3D &cpu->env; + switch (info->nb_cpus) { case 4: stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0); --=20 1.7.7