From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:48040) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SdyBK-0001Jj-1M for qemu-devel@nongnu.org; Mon, 11 Jun 2012 02:32:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SdyBH-0006hg-N2 for qemu-devel@nongnu.org; Mon, 11 Jun 2012 02:32:53 -0400 Received: from mail-pz0-f45.google.com ([209.85.210.45]:39854) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SdyBH-0006dM-EI for qemu-devel@nongnu.org; Mon, 11 Jun 2012 02:32:51 -0400 Received: by mail-pz0-f45.google.com with SMTP id v2so5483586dad.4 for ; Sun, 10 Jun 2012 23:32:50 -0700 (PDT) From: Jia Liu Date: Mon, 11 Jun 2012 14:31:53 +0800 Message-Id: <1339396324-21368-6-git-send-email-proljc@gmail.com> In-Reply-To: <1339396324-21368-1-git-send-email-proljc@gmail.com> References: <1339396324-21368-1-git-send-email-proljc@gmail.com> Content-Type: text/plain; charset="utf-8" Subject: [Qemu-devel] [PATCH v4 05/16] target-or32: Add exception support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Add OpenRISC exception support. Signed-off-by: Jia Liu --- target-openrisc/Makefile.objs | 4 ++-- target-openrisc/excp.c | 27 +++++++++++++++++++++++++++ target-openrisc/excp.h | 28 ++++++++++++++++++++++++++++ target-openrisc/excp_helper.c | 27 +++++++++++++++++++++++++++ target-openrisc/helper.h | 3 +++ 5 files changed, 87 insertions(+), 2 deletions(-) create mode 100644 target-openrisc/excp.c create mode 100644 target-openrisc/excp.h create mode 100644 target-openrisc/excp_helper.c diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs index 65f9391..382190a 100644 --- a/target-openrisc/Makefile.objs +++ b/target-openrisc/Makefile.objs @@ -1,3 +1,3 @@ obj-$(CONFIG_SOFTMMU) += machine.o -obj-y += cpu.o intrpt.o mmu.o translate.o -obj-y += intrpt_helper.o mmu_helper.o +obj-y += cpu.o excp.o intrpt.o mmu.o translate.o +obj-y += excp_helper.o intrpt_helper.o mmu_helper.o diff --git a/target-openrisc/excp.c b/target-openrisc/excp.c new file mode 100644 index 0000000..6d8c5dd --- /dev/null +++ b/target-openrisc/excp.c @@ -0,0 +1,27 @@ +/* + * OpenRISC exception. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "excp.h" + +void QEMU_NORETURN raise_exception(CPUOpenRISCState *env, uint32_t excp) +{ + env->exception_index = excp; + cpu_loop_exit(env); +} diff --git a/target-openrisc/excp.h b/target-openrisc/excp.h new file mode 100644 index 0000000..885203b --- /dev/null +++ b/target-openrisc/excp.h @@ -0,0 +1,28 @@ +/* + * OpenRISC exception header. + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef QEMU_OPENRISC_EXCP_H +#define QEMU_OPENRISC_EXCP_H + +#include "cpu.h" +#include "qemu-common.h" + +void QEMU_NORETURN raise_exception(CPUOpenRISCState *env, uint32_t excp); + +#endif /* QEMU_OPENRISC_EXCP_H */ diff --git a/target-openrisc/excp_helper.c b/target-openrisc/excp_helper.c new file mode 100644 index 0000000..c7d4110 --- /dev/null +++ b/target-openrisc/excp_helper.c @@ -0,0 +1,27 @@ +/* + * OpenRISC exception helper routines + * + * Copyright (c) 2011-2012 Jia Liu + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "cpu.h" +#include "helper.h" +#include "excp.h" + +void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) +{ + raise_exception(env, excp); +} diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h index 16d99b6..4e2a49f 100644 --- a/target-openrisc/helper.h +++ b/target-openrisc/helper.h @@ -19,6 +19,9 @@ #include "def-helper.h" +/* exception */ +DEF_HELPER_FLAGS_2(exception, 0, void, env, i32) + /* interrupt */ DEF_HELPER_FLAGS_1(rfe, 0, void, env) -- 1.7.9.5