From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:33832) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SfT77-0005UC-Ut for qemu-devel@nongnu.org; Fri, 15 Jun 2012 05:46:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SfT75-0000HA-4S for qemu-devel@nongnu.org; Fri, 15 Jun 2012 05:46:45 -0400 Received: from ra.se.axis.com ([195.60.68.13]:51649) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SfT74-0000GR-Qn for qemu-devel@nongnu.org; Fri, 15 Jun 2012 05:46:43 -0400 From: Lars Persson Date: Thu, 14 Jun 2012 16:23:55 +0200 Message-Id: <1339683835-13921-1-git-send-email-larper@axis.com> Subject: [Qemu-devel] [PATCH] cris: Fix NMI-flag handling on crisv10. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: edgar.iglesias@gmail.com, Lars Persson - The M-flag is encoded in different bits on cris v10 and cris v32. Signed-off-by: Lars Persson --- cpu-exec.c | 17 ++++++++++++----- target-cris/cpu.h | 3 ++- target-cris/helper.c | 4 ++-- target-cris/op_helper.c | 4 ++-- 4 files changed, 18 insertions(+), 10 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 83cac93..ce4718f 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -467,11 +467,18 @@ int cpu_exec(CPUArchState *env) do_interrupt(env); next_tb = 0; } - if (interrupt_request & CPU_INTERRUPT_NMI - && (env->pregs[PR_CCS] & M_FLAG)) { - env->exception_index = EXCP_NMI; - do_interrupt(env); - next_tb = 0; + if (interrupt_request & CPU_INTERRUPT_NMI) { + unsigned int m_flag_archval; + if (env->pregs[PR_VR] < 32) { + m_flag_archval = M_FLAG_V10; + } else { + m_flag_archval = M_FLAG_V32; + } + if ((env->pregs[PR_CCS] & m_flag_archval)) { + env->exception_index = EXCP_NMI; + do_interrupt(env); + next_tb = 0; + } } #elif defined(TARGET_M68K) if (interrupt_request & CPU_INTERRUPT_HARD diff --git a/target-cris/cpu.h b/target-cris/cpu.h index 73004af..4f4df6d 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -69,13 +69,14 @@ /* CPU flags. */ #define Q_FLAG 0x80000000 -#define M_FLAG 0x40000000 +#define M_FLAG_V32 0x40000000 #define PFIX_FLAG 0x800 /* CRISv10 Only. */ #define F_FLAG_V10 0x400 #define P_FLAG_V10 0x200 #define S_FLAG 0x200 #define R_FLAG 0x100 #define P_FLAG 0x80 +#define M_FLAG_V10 0x80 #define U_FLAG 0x40 #define I_FLAG 0x20 #define X_FLAG 0x10 diff --git a/target-cris/helper.c b/target-cris/helper.c index dcc19ef..bfbc29e 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -127,7 +127,7 @@ static void do_interruptv10(CPUCRISState *env) case EXCP_NMI: /* NMI is hardwired to vector zero. */ ex_vec = 0; - env->pregs[PR_CCS] &= ~M_FLAG; + env->pregs[PR_CCS] &= ~M_FLAG_V10; env->pregs[PRV10_BRP] = env->pc; break; @@ -185,7 +185,7 @@ void do_interrupt(CPUCRISState *env) case EXCP_NMI: /* NMI is hardwired to vector zero. */ ex_vec = 0; - env->pregs[PR_CCS] &= ~M_FLAG; + env->pregs[PR_CCS] &= ~M_FLAG_V32; env->pregs[PR_NRP] = env->pc; break; diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c index b92c106..ac7c98c 100644 --- a/target-cris/op_helper.c +++ b/target-cris/op_helper.c @@ -247,8 +247,8 @@ void helper_rfn(void) if (!rflag) env->pregs[PR_CCS] |= P_FLAG; - /* Always set the M flag. */ - env->pregs[PR_CCS] |= M_FLAG; + /* Always set the M flag. */ + env->pregs[PR_CCS] |= M_FLAG_V32; } uint32_t helper_lz(uint32_t t0) -- 1.7.2.5