From: Guan Xuetao <gxt@mprc.pku.edu.cn>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: qemu-devel@nongnu.org, chenwj@iis.sinica.edu.tw, afaerber@suse.de
Subject: Re: [Qemu-devel] [PATCHv3 12/14] unicore32-softmmu: Add puv3 dma support
Date: Wed, 20 Jun 2012 10:10:43 +0800 [thread overview]
Message-ID: <1340158243.1748.38.camel@ubuntu.ubuntu-domain> (raw)
In-Reply-To: <CAAu8pHuyi=NQtjz4TrEktBZvvqNcK2mQ-9qOLW2O75PJZSjQbw@mail.gmail.com>
On Mon, 2012-06-18 at 19:59 +0000, Blue Swirl wrote:
[snip]
> > +
> > +#define PUV3_DMA_CH_NR (6)
> > +#define PUV3_DMA_CH_MASK (0xff)
> > +#define PUV3_DMA_CH(offset) ((offset) >> 8)
> > +
> > +typedef struct {
> > + SysBusDevice busdev;
> > + MemoryRegion iomem;
> > + uint32_t reg_CFG[PUV3_DMA_CH_NR];
> > +} PUV3DMAState;
> > +
> > +static uint64_t puv3_dma_read(void *opaque, target_phys_addr_t offset,
> > + unsigned size)
> > +{
> > + PUV3DMAState *s = (PUV3DMAState *) opaque;
>
> These casts from void pointer are not needed in C.
I see. Thanks.
> > + uint32_t ret;
> > +
> > + assert(PUV3_DMA_CH(offset) < PUV3_DMA_CH_NR);
> > +
> > + switch (offset & PUV3_DMA_CH_MASK) {
> > + case 0x10:
> > + ret = s->reg_CFG[PUV3_DMA_CH(offset)];
> > + break;
> > + default:
> > + hw_error("%s: Bad offset 0x%x\n", __func__, offset);
>
> hw_error() also aborts, it would be nice to avoid that. However, the
> situation is somewhat different from the instruction case, since only
> privileged guest code (kernel) can write to hardware. The kernel can
> also for example power off the machine.
It's the same problem as cpu_abort. Warning information is enough here.
Is there a global and simple way to do it, g_warning()?
Guan Xuetao
next prev parent reply other threads:[~2012-06-20 2:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-18 9:24 [Qemu-devel] [PATCHv3 00/14] unicore32: add softmmu support and puv3 machine Guan Xuetao
2012-06-18 9:24 ` [Qemu-devel] [PATCHv3 01/14] unicore32-softmmu: Add unicore32-softmmu build support Guan Xuetao
2012-06-18 9:24 ` [Qemu-devel] [PATCHv3 02/14] unicore32-softmmu: Add coprocessor 0(sysctrl) and 1(ocd) instruction support Guan Xuetao
2012-06-18 19:51 ` Blue Swirl
2012-06-20 1:40 ` Guan Xuetao
2012-06-20 8:08 ` 陳韋任 (Wei-Ren Chen)
2012-06-21 17:44 ` Blue Swirl
2012-06-25 3:23 ` guanxuetao
2012-06-18 9:24 ` [Qemu-devel] [PATCHv3 03/14] unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runable Guan Xuetao
2012-06-18 9:24 ` [Qemu-devel] [PATCHv3 04/14] target-unicore32: Drop UC32_CPUID macros Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 05/14] unicore32-softmmu: Implement softmmu specific functions Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 06/14] unicore32-softmmu: Make sure that kernel can access user space Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 07/14] unicore32-softmmu: Add puv3 soc/board support Guan Xuetao
2012-06-18 20:02 ` Blue Swirl
2012-06-20 1:56 ` Guan Xuetao
2012-06-21 17:15 ` Blue Swirl
2012-06-25 3:14 ` guanxuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 08/14] unicore32-softmmu: Add puv3 interrupt support Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 09/14] unicore32-softmmu: Add puv3 ostimer support Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 10/14] unicore32-softmmu: Add puv3 gpio support Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 11/14] unicore32-softmmu: Add puv3 pm support Guan Xuetao
2012-06-18 20:05 ` Blue Swirl
2012-06-20 2:00 ` Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 12/14] unicore32-softmmu: Add puv3 dma support Guan Xuetao
2012-06-18 19:59 ` Blue Swirl
2012-06-20 2:10 ` Guan Xuetao [this message]
2012-06-21 17:20 ` Blue Swirl
2012-06-25 3:18 ` guanxuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 13/14] unicore32-softmmu: Add ps2 support Guan Xuetao
2012-06-18 9:25 ` [Qemu-devel] [PATCHv3 14/14] unicore32-softmmu: Add maintainer information for UniCore32 machine Guan Xuetao
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