From: Peter Maydell <peter.maydell@linaro.org>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: qemu-devel@nongnu.org, Anthony Liguori <anthony@codemonkey.ws>,
Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PATCH 13/33] target-arm: Convert generic timer cp15 regs
Date: Wed, 20 Jun 2012 13:27:01 +0100 [thread overview]
Message-ID: <1340195241-16620-14-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1340195241-16620-1-git-send-email-peter.maydell@linaro.org>
Convert the (dummy) generic timer cp15 implementation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 23 +++++++++++------------
1 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index ebe6a55..2d58eb5 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -317,6 +317,14 @@ static const ARMCPRegInfo v6k_cp_reginfo[] = {
REGINFO_SENTINEL
};
+static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
+ /* Dummy implementation: RAZ/WI the whole crn=14 space */
+ { .name = "GENERIC_TIMER", .cp = 15, .crn = 14,
+ .crm = CP_ANY, .opc1 = CP_ANY, .opc2 = CP_ANY,
+ .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
+ REGINFO_SENTINEL
+};
+
void register_cp_regs_for_features(ARMCPU *cpu)
{
/* Register all the coprocessor registers based on feature bits */
@@ -353,6 +361,9 @@ void register_cp_regs_for_features(ARMCPU *cpu)
if (arm_feature(env, ARM_FEATURE_THUMB2EE)) {
define_arm_cp_regs(cpu, t2ee_cp_reginfo);
}
+ if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
+ define_arm_cp_regs(cpu, generic_timer_cp_reginfo);
+ }
}
ARMCPU *cpu_arm_init(const char *cpu_model)
@@ -1720,12 +1731,6 @@ void HELPER(set_cp15)(CPUARMState *env, uint32_t insn, uint32_t val)
goto bad_reg;
}
break;
- case 14: /* Generic timer */
- if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
- /* Dummy implementation: RAZ/WI for all */
- break;
- }
- goto bad_reg;
case 15: /* Implementation specific. */
if (arm_feature(env, ARM_FEATURE_XSCALE)) {
if (op2 == 0 && crm == 1) {
@@ -2065,12 +2070,6 @@ uint32_t HELPER(get_cp15)(CPUARMState *env, uint32_t insn)
default:
goto bad_reg;
}
- case 14: /* Generic timer */
- if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
- /* Dummy implementation: RAZ/WI for all */
- return 0;
- }
- goto bad_reg;
case 15: /* Implementation specific. */
if (arm_feature(env, ARM_FEATURE_XSCALE)) {
if (op2 == 0 && crm == 1)
--
1.7.1
next prev parent reply other threads:[~2012-06-20 12:27 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-20 12:26 [Qemu-devel] [PULL 00/33] target-arm queue Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 01/33] target-arm: Fix 11MPCore cache type register value Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 02/33] target-arm: initial coprocessor register framework Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 03/33] hw/pxa2xx: Convert cp14 perf registers to new scheme Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 04/33] hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 05/33] hw/pxa2xx_pic: Convert coprocessor registers to new scheme Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 06/33] target-arm: Remove old cpu_arm_set_cp_io infrastructure Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 07/33] target-arm: Add register_cp_regs_for_features() Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 08/33] target-arm: Convert debug registers to cp_reginfo Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 09/33] target-arm: Convert TEECR, TEEHBR to new scheme Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 10/33] target-arm: Convert WFI/barriers special cases to cp_reginfo Peter Maydell
2012-06-20 12:26 ` [Qemu-devel] [PATCH 11/33] target-arm: Convert TLS registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 12/33] target-arm: Convert performance monitor registers Peter Maydell
2012-06-20 12:27 ` Peter Maydell [this message]
2012-06-20 12:27 ` [Qemu-devel] [PATCH 14/33] target-arm: Convert cp15 c3 register Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 15/33] target-arm: Convert MMU fault status cp15 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 16/33] target-arm: Convert cp15 crn=2 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 17/33] target-arm: Convert cp15 crn=13 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 18/33] target-arm: Convert cp15 crn=10 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 19/33] target-arm: Convert cp15 crn=15 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 20/33] target-arm: Convert cp15 MMU TLB control Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 21/33] target-arm: Convert cp15 VA-PA translation registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 22/33] target-arm: convert cp15 crn=7 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 23/33] target-arm: Convert cp15 crn=6 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 24/33] target-arm: Convert cp15 crn=9 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 25/33] target-arm: Convert cp15 crn=1 registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 26/33] target-arm: Convert cp15 crn=0 crm={1, 2} feature registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 27/33] target-arm: Convert cp15 cache ID registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 28/33] target-arm: Convert MPIDR Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 29/33] target-arm: Convert final ID registers Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 30/33] target-arm: Remove c0_cachetype CPUARMState field Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 31/33] target-arm: Move block cache ops to new cp15 framework Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 32/33] target-arm: Remove remaining old cp15 infrastructure Peter Maydell
2012-06-20 12:27 ` [Qemu-devel] [PATCH 33/33] target-arm: Remove ARM_CPUID_* macros Peter Maydell
2012-06-24 12:27 ` [Qemu-devel] [PULL 00/33] target-arm queue Blue Swirl
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