From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36902) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ShK0R-0003Tv-Oz for qemu-devel@nongnu.org; Wed, 20 Jun 2012 08:27:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ShK0M-0000zm-PK for qemu-devel@nongnu.org; Wed, 20 Jun 2012 08:27:31 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:33457) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ShK0M-0000zL-Fu for qemu-devel@nongnu.org; Wed, 20 Jun 2012 08:27:26 -0400 From: Peter Maydell Date: Wed, 20 Jun 2012 13:27:01 +0100 Message-Id: <1340195241-16620-14-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1340195241-16620-1-git-send-email-peter.maydell@linaro.org> References: <1340195241-16620-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 13/33] target-arm: Convert generic timer cp15 regs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel@nongnu.org, Anthony Liguori , Paul Brook Convert the (dummy) generic timer cp15 implementation. Signed-off-by: Peter Maydell --- target-arm/helper.c | 23 +++++++++++------------ 1 files changed, 11 insertions(+), 12 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index ebe6a55..2d58eb5 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -317,6 +317,14 @@ static const ARMCPRegInfo v6k_cp_reginfo[] = { REGINFO_SENTINEL }; +static const ARMCPRegInfo generic_timer_cp_reginfo[] = { + /* Dummy implementation: RAZ/WI the whole crn=14 space */ + { .name = "GENERIC_TIMER", .cp = 15, .crn = 14, + .crm = CP_ANY, .opc1 = CP_ANY, .opc2 = CP_ANY, + .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, + REGINFO_SENTINEL +}; + void register_cp_regs_for_features(ARMCPU *cpu) { /* Register all the coprocessor registers based on feature bits */ @@ -353,6 +361,9 @@ void register_cp_regs_for_features(ARMCPU *cpu) if (arm_feature(env, ARM_FEATURE_THUMB2EE)) { define_arm_cp_regs(cpu, t2ee_cp_reginfo); } + if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) { + define_arm_cp_regs(cpu, generic_timer_cp_reginfo); + } } ARMCPU *cpu_arm_init(const char *cpu_model) @@ -1720,12 +1731,6 @@ void HELPER(set_cp15)(CPUARMState *env, uint32_t insn, uint32_t val) goto bad_reg; } break; - case 14: /* Generic timer */ - if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) { - /* Dummy implementation: RAZ/WI for all */ - break; - } - goto bad_reg; case 15: /* Implementation specific. */ if (arm_feature(env, ARM_FEATURE_XSCALE)) { if (op2 == 0 && crm == 1) { @@ -2065,12 +2070,6 @@ uint32_t HELPER(get_cp15)(CPUARMState *env, uint32_t insn) default: goto bad_reg; } - case 14: /* Generic timer */ - if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) { - /* Dummy implementation: RAZ/WI for all */ - return 0; - } - goto bad_reg; case 15: /* Implementation specific. */ if (arm_feature(env, ARM_FEATURE_XSCALE)) { if (op2 == 0 && crm == 1) -- 1.7.1