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From: Jia Liu <proljc@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v6 05/16] target-or32: Add exception support
Date: Thu, 21 Jun 2012 10:57:57 +0800	[thread overview]
Message-ID: <1340247488-10542-6-git-send-email-proljc@gmail.com> (raw)
In-Reply-To: <1340247488-10542-1-git-send-email-proljc@gmail.com>

Add OpenRISC exception support.

Signed-off-by: Jia Liu <proljc@gmail.com>
---
 target-openrisc/Makefile.objs |    4 ++--
 target-openrisc/excp.c        |   27 +++++++++++++++++++++++++++
 target-openrisc/excp.h        |   28 ++++++++++++++++++++++++++++
 target-openrisc/excp_helper.c |   27 +++++++++++++++++++++++++++
 target-openrisc/helper.h      |    3 +++
 5 files changed, 87 insertions(+), 2 deletions(-)
 create mode 100644 target-openrisc/excp.c
 create mode 100644 target-openrisc/excp.h
 create mode 100644 target-openrisc/excp_helper.c

diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs
index 65f9391..382190a 100644
--- a/target-openrisc/Makefile.objs
+++ b/target-openrisc/Makefile.objs
@@ -1,3 +1,3 @@
 obj-$(CONFIG_SOFTMMU) += machine.o
-obj-y += cpu.o intrpt.o mmu.o translate.o
-obj-y += intrpt_helper.o mmu_helper.o
+obj-y += cpu.o excp.o intrpt.o mmu.o translate.o
+obj-y += excp_helper.o intrpt_helper.o mmu_helper.o
diff --git a/target-openrisc/excp.c b/target-openrisc/excp.c
new file mode 100644
index 0000000..6d8c5dd
--- /dev/null
+++ b/target-openrisc/excp.c
@@ -0,0 +1,27 @@
+/*
+ *  OpenRISC exception.
+ *
+ *  Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+#include "excp.h"
+
+void QEMU_NORETURN raise_exception(CPUOpenRISCState *env, uint32_t excp)
+{
+    env->exception_index = excp;
+    cpu_loop_exit(env);
+}
diff --git a/target-openrisc/excp.h b/target-openrisc/excp.h
new file mode 100644
index 0000000..885203b
--- /dev/null
+++ b/target-openrisc/excp.h
@@ -0,0 +1,28 @@
+/*
+ *  OpenRISC exception header.
+ *
+ *  Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef QEMU_OPENRISC_EXCP_H
+#define QEMU_OPENRISC_EXCP_H
+
+#include "cpu.h"
+#include "qemu-common.h"
+
+void QEMU_NORETURN raise_exception(CPUOpenRISCState *env, uint32_t excp);
+
+#endif /* QEMU_OPENRISC_EXCP_H */
diff --git a/target-openrisc/excp_helper.c b/target-openrisc/excp_helper.c
new file mode 100644
index 0000000..c7d4110
--- /dev/null
+++ b/target-openrisc/excp_helper.c
@@ -0,0 +1,27 @@
+/*
+ *  OpenRISC exception helper routines
+ *
+ *  Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+#include "helper.h"
+#include "excp.h"
+
+void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
+{
+    raise_exception(env, excp);
+}
diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h
index 16d99b6..4e2a49f 100644
--- a/target-openrisc/helper.h
+++ b/target-openrisc/helper.h
@@ -19,6 +19,9 @@
 
 #include "def-helper.h"
 
+/* exception */
+DEF_HELPER_FLAGS_2(exception, 0, void, env, i32)
+
 /* interrupt */
 DEF_HELPER_FLAGS_1(rfe, 0, void, env)
 
-- 
1.7.9.5

  parent reply	other threads:[~2012-06-21  2:58 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-21  2:57 [Qemu-devel] [PATCH v6 00/16] QEMU OpenRISC support Jia Liu
2012-06-21  2:57 ` [Qemu-devel] [PATCH v6 01/16] target-or32: Add target stubs and cpu support Jia Liu
2012-06-21  2:57 ` [Qemu-devel] [PATCH v6 02/16] target-or32: Add target machine Jia Liu
2012-06-21  2:57 ` [Qemu-devel] [PATCH v6 03/16] target-or32: Add MMU support Jia Liu
2012-06-21  2:57 ` [Qemu-devel] [PATCH v6 04/16] target-or32: Add interrupt support Jia Liu
2012-06-21  2:57 ` Jia Liu [this message]
2012-06-21  2:57 ` [Qemu-devel] [PATCH v6 06/16] target-or32: Add int instruction helpers Jia Liu
2012-06-21  2:57 ` [Qemu-devel] [PATCH v6 07/16] target-or32: Add float " Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 08/16] target-or32: Add instruction tanslation Jia Liu
2012-06-21 10:24   ` Max Filippov
2012-06-25  2:50     ` Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 09/16] target-or32: Add PIC support Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 10/16] target-or32: Add timer support Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 11/16] target-or32: Add a IIS dummy board Jia Liu
2012-06-21  8:19   ` 陳韋任 (Wei-Ren Chen)
2012-06-21  9:10     ` Max Filippov
2012-06-21  9:11     ` Jia Liu
2012-06-21  9:03   ` Peter Crosthwaite
2012-06-25  2:23     ` Jia Liu
2012-06-25  2:33       ` Peter Crosthwaite
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 12/16] target-or32: Add system instructions Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 13/16] target-or32: Add gdb stub Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 14/16] target-or32: Add linux syscall, signal and termbits Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 15/16] target-or32: Add linux user support Jia Liu
2012-06-21  2:58 ` [Qemu-devel] [PATCH v6 16/16] target-or32: Add testcases Jia Liu

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