From: Alexander Graf <agraf@suse.de>
To: qemu-devel qemu-devel <qemu-devel@nongnu.org>
Cc: Caraman Mihai Claudiu-B02008 <B02008@freescale.com>,
qemu-ppc Mailing List <qemu-ppc@nongnu.org>
Subject: [Qemu-devel] [PATCH v2 07/11] PPC: BookE: Make ivpr selectable by CPU type
Date: Thu, 21 Jun 2012 15:33:56 +0200 [thread overview]
Message-ID: <1340285640-28669-8-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1340285640-28669-1-git-send-email-agraf@suse.de>
IVPR can either hold 32 or 64 bit addresses, depending on the CPU type. Let
the CPU initialization function pass in its mask itself, so we can easily
extend it.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
target-ppc/translate_init.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 57027a2..98695ab 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -2804,7 +2804,7 @@ static void init_excp_G2 (CPUPPCState *env)
#endif
}
-static void init_excp_e200 (CPUPPCState *env)
+static void init_excp_e200(CPUPPCState *env, target_ulong ivpr_mask)
{
#if !defined(CONFIG_USER_ONLY)
env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000FFC;
@@ -2829,7 +2829,7 @@ static void init_excp_e200 (CPUPPCState *env)
env->excp_vectors[POWERPC_EXCP_EFPRI] = 0x00000000;
env->hreset_excp_prefix = 0x00000000UL;
env->ivor_mask = 0x0000FFF7UL;
- env->ivpr_mask = 0xFFFF0000UL;
+ env->ivpr_mask = ivpr_mask;
/* Hardware reset vector */
env->hreset_vector = 0xFFFFFFFCUL;
#endif
@@ -4307,7 +4307,7 @@ static void init_proc_e200 (CPUPPCState *env)
env->id_tlbs = 0;
env->tlb_type = TLB_EMB;
#endif
- init_excp_e200(env);
+ init_excp_e200(env, 0xFFFF0000UL);
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* XXX: TODO: allocate internal IRQ controller */
@@ -4434,6 +4434,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
{
uint32_t tlbncfg[2];
uint64_t ivor_mask = 0x0000000F0000FFFFULL;
+ uint64_t ivpr_mask = 0xFFFF0000ULL;
uint32_t l1cfg0 = 0x3800 /* 8 ways */
| 0x0020; /* 32 kb */
#if !defined(CONFIG_USER_ONLY)
@@ -4575,7 +4576,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
}
#endif
- init_excp_e200(env);
+ init_excp_e200(env, ivpr_mask);
/* Allocate hardware IRQ controller */
ppce500_irq_init(env);
}
--
1.6.0.2
next prev parent reply other threads:[~2012-06-21 13:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-21 13:33 [Qemu-devel] [PATCH v2 00/11] PPC: e5500 emulation Alexander Graf
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 01/11] dt: make setprop argument static Alexander Graf
2012-06-23 0:47 ` Peter Crosthwaite
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 02/11] PPC: e500: allow users to set the /compatible property via -machine Alexander Graf
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 03/11] uImage: increase the gzip load size Alexander Graf
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 04/11] PPC: Add some booke SPR defines Alexander Graf
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 05/11] PPC: Add support for MSR_CM Alexander Graf
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 06/11] PPC: BookE: Implement EPR SPR Alexander Graf
2012-06-21 13:33 ` Alexander Graf [this message]
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 08/11] PPC: Add e5500 CPU target Alexander Graf
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 09/11] PPC: Extract SPR dump generation into its own function Alexander Graf
2012-06-21 13:33 ` [Qemu-devel] [PATCH v2 10/11] PPC: BookE: Support 32 and 64 bit wide MAS2 Alexander Graf
2012-06-21 16:04 ` Scott Wood
2012-06-21 16:32 ` Alexander Graf
2012-06-21 13:34 ` [Qemu-devel] [PATCH v2 11/11] PPC: BookE206: Bump MAS2 to 64bit Alexander Graf
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